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2023-06-21target/tricore: Honour privilege changes on PSW writeBastian Koppelmann
2023-06-21target/tricore: Implement privilege level for all insnsBastian Koppelmann
2023-06-21target/tricore: Introduce priv tb flagBastian Koppelmann
2023-06-21target/tricore: Indirect jump insns use tcg_gen_lookup_and_goto_ptr()Bastian Koppelmann
2023-06-21target/tricore: ENABLE exit to main-loopBastian Koppelmann
2023-06-21target/tricore: Introduce DISAS_TARGET_EXITBastian Koppelmann
2023-06-21target/tricore: Fix RR_JLI clobbering reg A[11]Bastian Koppelmann
2023-06-21target/tricore: Fix helper_ret() not correctly restoring PSWBastian Koppelmann
2023-06-21target/tricore: Add CHECK_REG_PAIR() for insn accessing 64 bit regsBastian Koppelmann
2023-06-21target/tricore: Correctly fix saving PSW.CDE to CSA on callBastian Koppelmann
2023-06-21target/tricore: Fix out-of-bounds index in imask instructionSiqi Chen
2023-06-21target/tricore: Add DISABLE insn variantBastian Koppelmann
2023-06-21target/tricore: Implement SYCSCALL insnBastian Koppelmann
2023-06-21target/tricore: Add shuffle insnBastian Koppelmann
2023-06-21target/tricore: Add crc32.b insnBastian Koppelmann
2023-06-21target/tricore: Add crc32l.w insnBastian Koppelmann
2023-06-21target/tricore: Add LHA insnBastian Koppelmann
2023-06-21target/tricore: Add popcnt.w insnBastian Koppelmann
2023-06-21target/tricore: Introduce ISA 1.6.2 featureBastian Koppelmann
2023-06-20meson: Replace softmmu_ss -> system_ssPhilippe Mathieu-Daudé
2023-06-20meson: Replace CONFIG_SOFTMMU -> CONFIG_SYSTEM_ONLYPhilippe Mathieu-Daudé
2023-06-20target/ppc: Check for USER_ONLY definition instead of SOFTMMU onePhilippe Mathieu-Daudé
2023-06-20target/m68k: Check for USER_ONLY definition instead of SOFTMMU onePhilippe Mathieu-Daudé
2023-06-20target/tricore: Remove pointless CONFIG_SOFTMMU guardPhilippe Mathieu-Daudé
2023-06-20target/i386: Simplify i386_tr_init_disas_context()Philippe Mathieu-Daudé
2023-06-19target/arm: Convert load/store tags insns to decodetreePeter Maydell
2023-06-19target/arm: Convert load/store single structure to decodetreePeter Maydell
2023-06-19target/arm: Convert load/store (multiple structures) to decodetreePeter Maydell
2023-06-19target/arm: Convert LDAPR/STLR (imm) to decodetreePeter Maydell
2023-06-19target/arm: Convert load (pointer auth) insns to decodetreePeter Maydell
2023-06-19target/arm: Convert atomic memory ops to decodetreePeter Maydell
2023-06-19target/arm: Convert LDR/STR reg+reg to decodetreePeter Maydell
2023-06-19target/arm: Convert LDR/STR with 12-bit immediate to decodetreePeter Maydell
2023-06-19target/arm: Convert ld/st reg+imm9 insns to decodetreePeter Maydell
2023-06-19target/arm: Convert load/store-pair to decodetreePeter Maydell
2023-06-19target/arm: Convert load reg (literal) group to decodetreePeter Maydell
2023-06-19target/arm: Convert LDXP, STXP, CASP, CAS to decodetreePeter Maydell
2023-06-19target/arm: Convert load/store exclusive and ordered to decodetreePeter Maydell
2023-06-19target/arm: Convert exception generation instructions to decodetreePeter Maydell
2023-06-19target/arm: Convert MSR (reg), MRS, SYS, SYSL to decodetreePeter Maydell
2023-06-19target/arm: Convert MSR (immediate) to decodetreePeter Maydell
2023-06-19target/arm: Convert CFINV, XAFLAG and AXFLAG to decodetreePeter Maydell
2023-06-19target/arm: Convert barrier insns to decodetreePeter Maydell
2023-06-19target/arm: Convert hint instruction space to decodetreePeter Maydell
2023-06-19target/arm: Consistently use finalize_memop_asimd() for ASIMD loads/storesPeter Maydell
2023-06-19target/arm: Pass memop to gen_mte_check1_mmuidx() in reg_imm9 decodePeter Maydell
2023-06-19target/arm: Return correct result for LDG when ATA=0Peter Maydell
2023-06-19target/arm: Fix return value from LDSMIN/LDSMAX 8/16 bit atomicsPeter Maydell
2023-06-16Merge tag 'pull-loongarch-20230616' of https://gitlab.com/gaosong/qemu into s...Richard Henderson
2023-06-16target/loongarch: Fix CSR.DMW0-3.VSEG checkJiajie Chen