diff options
| author | Bastian Koppelmann <kbastian@mail.uni-paderborn.de> | 2023-06-14 12:00:36 +0200 |
|---|---|---|
| committer | Bastian Koppelmann <kbastian@mail.uni-paderborn.de> | 2023-06-21 17:56:45 +0200 |
| commit | 0eaafe33d03447f36ff152010836d501ba68c710 (patch) | |
| tree | 4d42579490473770f77c33e84fa5e02b1757d97a /target | |
| parent | dc0b4368be92d85fc9fb2d48922149759c1f7804 (diff) | |
target/tricore: Add crc32.b insn
reported in https://gitlab.com/qemu-project/qemu/-/issues/1667
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Message-Id: <20230614100039.1337971-6-kbastian@mail.uni-paderborn.de>
Diffstat (limited to 'target')
| -rw-r--r-- | target/tricore/helper.h | 1 | ||||
| -rw-r--r-- | target/tricore/op_helper.c | 8 | ||||
| -rw-r--r-- | target/tricore/translate.c | 7 | ||||
| -rw-r--r-- | target/tricore/tricore-opcodes.h | 1 |
4 files changed, 17 insertions, 0 deletions
diff --git a/target/tricore/helper.h b/target/tricore/helper.h index 24da5e97c0..a10576e09e 100644 --- a/target/tricore/helper.h +++ b/target/tricore/helper.h @@ -131,6 +131,7 @@ DEF_HELPER_FLAGS_5(mul_h, TCG_CALL_NO_RWG_SE, i64, i32, i32, i32, i32, i32) DEF_HELPER_FLAGS_5(mulm_h, TCG_CALL_NO_RWG_SE, i64, i32, i32, i32, i32, i32) DEF_HELPER_FLAGS_5(mulr_h, TCG_CALL_NO_RWG_SE, i32, i32, i32, i32, i32, i32) /* crc32 */ +DEF_HELPER_FLAGS_2(crc32b, TCG_CALL_NO_RWG_SE, i32, i32, i32) DEF_HELPER_FLAGS_2(crc32_be, TCG_CALL_NO_RWG_SE, i32, i32, i32) DEF_HELPER_FLAGS_2(crc32_le, TCG_CALL_NO_RWG_SE, i32, i32, i32) /* CSA */ diff --git a/target/tricore/op_helper.c b/target/tricore/op_helper.c index 8ce404cb93..b6ef1462e4 100644 --- a/target/tricore/op_helper.c +++ b/target/tricore/op_helper.c @@ -2284,6 +2284,14 @@ uint32_t helper_mulr_h(uint32_t arg00, uint32_t arg01, return (result1 & 0xffff0000) | (result0 >> 16); } +uint32_t helper_crc32b(uint32_t arg0, uint32_t arg1) +{ + uint8_t buf[1] = { arg0 & 0xff }; + + return crc32(arg1, buf, 1); +} + + uint32_t helper_crc32_be(uint32_t arg0, uint32_t arg1) { uint8_t buf[4]; diff --git a/target/tricore/translate.c b/target/tricore/translate.c index 250de80de5..85526ef4db 100644 --- a/target/tricore/translate.c +++ b/target/tricore/translate.c @@ -6190,6 +6190,13 @@ static void decode_rr_divide(DisasContext *ctx) CHECK_REG_PAIR(r3); gen_unpack(cpu_gpr_d[r3], cpu_gpr_d[r3+1], cpu_gpr_d[r1]); break; + case OPC2_32_RR_CRC32_B: + if (has_feature(ctx, TRICORE_FEATURE_162)) { + gen_helper_crc32b(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); + } else { + generate_trap(ctx, TRAPC_INSN_ERR, TIN2_IOPC); + } + break; case OPC2_32_RR_CRC32: /* CRC32B.W in 1.6.2 */ if (has_feature(ctx, TRICORE_FEATURE_161)) { gen_helper_crc32_be(cpu_gpr_d[r3], cpu_gpr_d[r1], cpu_gpr_d[r2]); diff --git a/target/tricore/tricore-opcodes.h b/target/tricore/tricore-opcodes.h index be07f82ec1..27f80e1702 100644 --- a/target/tricore/tricore-opcodes.h +++ b/target/tricore/tricore-opcodes.h @@ -1140,6 +1140,7 @@ enum { OPC2_32_RR_PARITY = 0x02, OPC2_32_RR_UNPACK = 0x08, OPC2_32_RR_CRC32 = 0x03, /* CRC32B.W in 1.6.2 */ + OPC2_32_RR_CRC32_B = 0x06, /* 1.6.2 only */ OPC2_32_RR_CRC32L_W = 0x07, /* 1.6.2 only */ OPC2_32_RR_POPCNT_W = 0x22, /* 1.6.2 only */ OPC2_32_RR_DIV = 0x20, |