diff options
author | Bastian Koppelmann <kbastian@mail.uni-paderborn.de> | 2023-06-21 16:22:57 +0200 |
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committer | Bastian Koppelmann <kbastian@mail.uni-paderborn.de> | 2023-06-21 18:09:54 +0200 |
commit | 2dbd73bf17f4c6bf016709d995ea46477cb6133c (patch) | |
tree | beb0a8d7ea894c78353eb2713fe1f3c4a5ef3422 /target | |
parent | 1706e04f6e807431b460b4109ab65bb469adc53a (diff) |
target/tricore: ENABLE exit to main-loop
so we can recognize exceptions after re-enabling interrupts.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reported-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Message-Id: <20230621142302.1648383-4-kbastian@mail.uni-paderborn.de>
Diffstat (limited to 'target')
-rw-r--r-- | target/tricore/translate.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/target/tricore/translate.c b/target/tricore/translate.c index ef74e9f234..98e2767d21 100644 --- a/target/tricore/translate.c +++ b/target/tricore/translate.c @@ -38,6 +38,7 @@ #undef HELPER_H #define DISAS_EXIT DISAS_TARGET_0 +#define DISAS_EXIT_UPDATE DISAS_TARGET_1 /* * TCG registers @@ -7900,6 +7901,7 @@ static void decode_sys_interrupts(DisasContext *ctx) break; case OPC2_32_SYS_ENABLE: tcg_gen_ori_tl(cpu_ICR, cpu_ICR, ctx->icr_ie_mask); + ctx->base.is_jmp = DISAS_EXIT_UPDATE; break; case OPC2_32_SYS_ISYNC: break; @@ -8387,6 +8389,9 @@ static void tricore_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu) case DISAS_TOO_MANY: gen_goto_tb(ctx, 0, ctx->base.pc_next); break; + case DISAS_EXIT_UPDATE: + gen_save_pc(ctx->base.pc_next); + /* fall through */ case DISAS_EXIT: tcg_gen_exit_tb(NULL, 0); break; |