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AgeCommit message (Expand)Author
2024-07-22target/riscv: Restrict semihosting to TCGPhilippe Mathieu-Daudé
2024-07-18target/riscv: raise an exception when CSRRS/CSRRC writes a read-only CSRYu-Ming Chang
2024-07-18target/riscv: Expose the Smcntrpmf configAtish Patra
2024-07-18target/riscv: Do not setup pmu timer if OF is disabledAtish Patra
2024-07-18target/riscv: More accurately model priv mode filtering.Rajnesh Kanwal
2024-07-18target/riscv: Start counters from both mhpmcounter and mcountinhibitRajnesh Kanwal
2024-07-18target/riscv: Enforce WARL behavior for scounteren/hcounterenAtish Patra
2024-07-18target/riscv: Save counter values during countinhibit updateAtish Patra
2024-07-18target/riscv: Implement privilege mode filtering for cycle/instretAtish Patra
2024-07-18target/riscv: Only set INH fields if priv mode is availableAtish Patra
2024-07-18target/riscv: Add cycle & instret privilege mode filtering supportKaiwen Xue
2024-07-18target/riscv: Add cycle & instret privilege mode filtering definitionsKaiwen Xue
2024-07-18target/riscv: Add cycle & instret privilege mode filtering propertiesKaiwen Xue
2024-07-18target/riscv: Fix the predicate functions for mhpmeventhX CSRsAtish Patra
2024-07-18target/riscv: Combine set_mode and set_virt functions.Rajnesh Kanwal
2024-07-18target/riscv/kvm: update KVM regs to Linux 6.10-rc5Daniel Henrique Barboza
2024-07-18target/riscv: Validate the mode in write_vstvecJiayi Li
2024-07-18target/riscv: Expose zabha extension as a cpu propertyLIU Zhiwei
2024-07-18target/riscv: Add amocas.[b|h] for ZabhaLIU Zhiwei
2024-07-18target/riscv: Move gen_cmpxchg before adding amocas.[b|h]LIU Zhiwei
2024-07-18target/riscv: Add AMO instructions for ZabhaLIU Zhiwei
2024-07-18target/riscv: Move gen_amo before implement ZabhaLIU Zhiwei
2024-07-18target/riscv: Support Zama16b extensionLIU Zhiwei
2024-07-18target/riscv: Add zcmop extensionLIU Zhiwei
2024-07-18target/riscv: Add zimop extensionLIU Zhiwei
2024-07-11target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementationPeter Maydell
2024-06-27target/riscv: Apply modularized matching conditions for icount triggerAlvin Chang
2024-06-27target/riscv: Apply modularized matching conditions for watchpointAlvin Chang
2024-06-27target/riscv: Add functions for common matching conditions of triggerAlvin Chang
2024-06-26target/riscv: Remove extension auto-update check statementsFrank Chang
2024-06-26target/riscv: Add Zc extension implied ruleFrank Chang
2024-06-26target/riscv: Add multi extension implied rulesFrank Chang
2024-06-26target/riscv: Add MISA extension implied rulesFrank Chang
2024-06-26target/riscv: Introduce extension implied rule helpersFrank Chang
2024-06-26target/riscv: Introduce extension implied rules definitionFrank Chang
2024-06-26target/riscv: fix instructions count handling in icount modeClément Léger
2024-06-26target/riscv: Fix froundnx.h nanbox checkBranislav Brzak
2024-06-26target/riscv: Support the version for ss1p13Fea.Wang
2024-06-26target/riscv: Reserve exception codes for sw-check and hw-errFea.Wang
2024-06-26target/riscv: Add MEDELEGH, HEDELEGH csrs for RV32Fea.Wang
2024-06-26target/riscv: Add 'P1P13' bit in SMSTATEEN0Fea.Wang
2024-06-26target/riscv: Define macros and variables for ss1p13Fea.Wang
2024-06-26target/riscv: Reuse the conversion function of priv_specJim Shu
2024-06-26target/riscv/kvm: handle the exit with debug reasonChao Du
2024-06-26target/riscv/kvm: add software breakpoints supportChao Du
2024-06-26target/riscv: zvbb implies zvkbJerry Zhang Jian
2024-06-26target/riscv: Move Guest irqs out of the core local irqs range.Rajnesh Kanwal
2024-06-26target/riscv: Extend virtual irq csrs masks to be 64 bit wide.Rajnesh Kanwal
2024-06-04Merge tag 'hw-misc-accel-20240604' of https://github.com/philmd/qemu into sta...Richard Henderson
2024-06-04target/riscv: Restrict riscv_cpu_do_interrupt() to sysemuPhilippe Mathieu-Daudé
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