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QEMU is a generic and open source machine & userspace emulator and virtualizer
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riscv
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insn32.decode
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Commit message (
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Author
2022-04-29
target/riscv: rvk: add support for zksed/zksh extension
Weiwei Li
2022-04-29
target/riscv: rvk: add support for sha512 related instructions for RV64 in zk...
Weiwei Li
2022-04-29
target/riscv: rvk: add support for sha512 related instructions for RV32 in zk...
Weiwei Li
2022-04-29
target/riscv: rvk: add support for sha256 related instructions in zknh extension
Weiwei Li
2022-04-29
target/riscv: rvk: add support for zkne/zknd extension in RV64
Weiwei Li
2022-04-29
target/riscv: rvk: add support for zknd/zkne extension in RV32
Weiwei Li
2022-04-29
target/riscv: rvk: add support for zbkx extension
Weiwei Li
2022-04-29
target/riscv: rvk: add support for zbkc extension
Weiwei Li
2022-04-29
target/riscv: rvk: add support for zbkb extension
Weiwei Li
2022-02-16
target/riscv: add support for svinval extension
Weiwei Li
2022-01-08
target/riscv: support for 128-bit M extension
Frédéric Pétrot
2022-01-08
target/riscv: support for 128-bit arithmetic instructions
Frédéric Pétrot
2022-01-08
target/riscv: support for 128-bit shift instructions
Frédéric Pétrot
2022-01-08
target/riscv: accessors to registers upper part and 128-bit load/store
Frédéric Pétrot
2021-12-20
target/riscv: rvv-1.0: rename vmandnot.mm and vmornot.mm to vmandn.mm and vmo...
Frank Chang
2021-12-20
target/riscv: rvv-1.0: add vector unit-stride mask load/store insns
Frank Chang
2021-12-20
target/riscv: rvv-1.0: add vsetivli instruction
Frank Chang
2021-12-20
target/riscv: rvv-1.0: rename r2_zimm to r2_zimm11
Frank Chang
2021-12-20
target/riscv: rvv-1.0: floating-point reciprocal estimate instruction
Frank Chang
2021-12-20
target/riscv: rvv-1.0: floating-point reciprocal square-root estimate instruc...
Frank Chang
2021-12-20
target/riscv: rvv-1.0: narrowing floating-point/integer type-convert
Frank Chang
2021-12-20
target/riscv: rvv-1.0: widening floating-point/integer type-convert
Frank Chang
2021-12-20
target/riscv: rvv-1.0: floating-point/integer type-convert instructions
Frank Chang
2021-12-20
target/riscv: rvv-1.0: remove integer extract instruction
Frank Chang
2021-12-20
target/riscv: rvv-1.0: remove vmford.vv and vmford.vf
Frank Chang
2021-12-20
target/riscv: rvv-1.0: remove widening saturating scaled multiply-add
Frank Chang
2021-12-20
target/riscv: rvv-1.0: narrowing fixed-point clip instructions
Frank Chang
2021-12-20
target/riscv: rvv-1.0: floating-point slide instructions
Frank Chang
2021-12-20
target/riscv: rvv-1.0: widening integer multiply-add instructions
Frank Chang
2021-12-20
target/riscv: rvv-1.0: narrowing integer right shift instructions
Frank Chang
2021-12-20
target/riscv: rvv-1.0: integer add-with-carry/subtract-with-borrow
Frank Chang
2021-12-20
target/riscv: rvv-1.0: single-width averaging add and subtract instructions
Frank Chang
2021-12-20
target/riscv: rvv-1.0: integer extension instructions
Frank Chang
2021-12-20
target/riscv: rvv-1.0: whole register move instructions
Frank Chang
2021-12-20
target/riscv: rvv-1.0: floating-point scalar move instructions
Frank Chang
2021-12-20
target/riscv: rvv-1.0: integer scalar move instructions
Frank Chang
2021-12-20
target/riscv: rvv-1.0: register gather instructions
Frank Chang
2021-12-20
target/riscv: rvv-1.0: element index instruction
Frank Chang
2021-12-20
target/riscv: rvv-1.0: iota instruction
Frank Chang
2021-12-20
target/riscv: rvv-1.0: set-X-first mask bit instructions
Frank Chang
2021-12-20
target/riscv: rvv-1.0: find-first-set mask bit instruction
Frank Chang
2021-12-20
target/riscv: rvv-1.0: count population in mask instruction
Frank Chang
2021-12-20
target/riscv: rvv-1.0: floating-point classify instructions
Frank Chang
2021-12-20
target/riscv: rvv-1.0: floating-point square-root instruction
Frank Chang
2021-12-20
target/riscv: rvv-1.0: load/store whole register instructions
Frank Chang
2021-12-20
target/riscv: rvv-1.0: fault-only-first unit stride load
Frank Chang
2021-12-20
target/riscv: rvv-1.0: index load and store instructions
Frank Chang
2021-12-20
target/riscv: rvv-1.0: stride load and store instructions
Frank Chang
2021-12-20
target/riscv: rvv-1.0: remove amo operations instructions
Frank Chang
2021-12-20
target/riscv: zfh: half-precision floating-point classify
Kito Cheng
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