slackcoder/qemu - QEMU is a generic and open source machine & userspace emulator and virtualizer

Age	Commit message (Expand)	Author
2024-10-31	target/riscv: Expose zicfiss extension as a cpu property	Deepak Gupta
2024-10-30	target/riscv: introduce ssp and enabling controls for zicfiss	Deepak Gupta
2024-10-30	target/riscv: Add zicfiss extension	Deepak Gupta
2024-10-30	target/riscv: Expose zicfilp extension as a cpu property	Deepak Gupta
2024-10-30	target/riscv: Introduce elp state and enabling controls for zicfilp	Deepak Gupta
2024-10-30	target/riscv: Add zicfilp extension	Deepak Gupta
2024-10-30	target/riscv: expose *envcfg csr and priv to qemu-user as well	Deepak Gupta
2024-10-30	target/riscv: Set vtype.vill on CPU reset	Rob Bradford
2024-10-30	target/riscv: Add max32 CPU for RV64 QEMU	LIU Zhiwei
2024-10-30	target/riscv: Enable RV32 CPU support in RV64 QEMU	TANG Tiancheng
2024-10-02	target: riscv: Add Svvptc extension support	Alexandre Ghiti
2024-10-02	target/riscv/cpu.c: Add 'fcsr' register to QEMU log as a part of F extension	Maria Klauchek
2024-10-02	target: riscv: Enable Bit Manip for OpenTitan Ibex CPU	Alistair Francis
2024-10-02	target/riscv: fix za64rs enabling	Vladimir Isaev
2024-10-02	target/riscv: Add a property to set vl to ceil(AVL/2)	Jason Chien
2024-09-13	target/riscv: Remove the deprecated 'any' CPU type	Philippe Mathieu-Daudé
2024-07-18	target/riscv: Expose the Smcntrpmf config	Atish Patra
2024-07-18	target/riscv: Add cycle & instret privilege mode filtering properties	Kaiwen Xue
2024-07-18	target/riscv: Expose zabha extension as a cpu property	LIU Zhiwei
2024-07-18	target/riscv: Support Zama16b extension	LIU Zhiwei
2024-07-18	target/riscv: Add zcmop extension	LIU Zhiwei
2024-07-18	target/riscv: Add zimop extension	LIU Zhiwei
2024-07-11	target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation	Peter Maydell
2024-06-26	target/riscv: Add multi extension implied rules	Frank Chang
2024-06-26	target/riscv: Add MISA extension implied rules	Frank Chang
2024-06-26	target/riscv: Introduce extension implied rules definition	Frank Chang
2024-06-26	target/riscv: Support the version for ss1p13	Fea.Wang
2024-06-26	target/riscv: Reuse the conversion function of priv_spec	Jim Shu
2024-06-04	Merge tag 'hw-misc-accel-20240604' of https://github.com/philmd/qemu into sta...	Richard Henderson
2024-06-04	target/riscv: Restrict 'rv128' machine to TCG accelerator	Philippe Mathieu-Daudé
2024-06-03	target/riscv: Remove experimental prefix from "B" extension	Rob Bradford
2024-06-03	riscv: thead: Add th.sxstatus CSR emulation	Christoph Müllner
2024-06-03	target/riscv: Implement dynamic establishment of custom decoder	Huang Tao
2024-06-03	target/riscv/cpu.c: fix Zvkb extension config	Yangyu Chen
2024-06-03	target/riscv: Add support for Zve64x extension	Jason Chien
2024-06-03	target/riscv: Add support for Zve32x extension	Jason Chien
2024-04-25	hw, target: Add ResetType argument to hold and exit phase methods	Peter Maydell
2024-03-22	target/riscv: do not enable all named features by default	Daniel Henrique Barboza
2024-03-12	target: Replace CPU_GET_CLASS(cpu -> obj) in cpu_reset_hold() handler	Philippe Mathieu-Daudé
2024-03-08	target/riscv: move ratified/frozen exts to non-experimental	Daniel Henrique Barboza
2024-03-08	RISC-V: Add support for Ztso	Palmer Dabbelt
2024-03-08	target/riscv: Promote svade to a normal extension	Andrew Jones
2024-03-08	target/riscv: Gate hardware A/D PTE bit updating	Andrew Jones
2024-03-08	target/riscv: Reset henvcfg to zero	Andrew Jones
2024-03-08	target/riscv: add remaining named features	Daniel Henrique Barboza
2024-03-08	target/riscv: add riscv,isa to named features	Daniel Henrique Barboza
2024-02-28	hw/core/cpu: Remove gdb_get_dynamic_xml member	Akihiko Odaki
2024-02-28	gdbstub: Infer number of core registers from XML	Akihiko Odaki
2024-02-28	target/riscv: Use GDBFeature for dynamic XML	Akihiko Odaki
2024-02-09	target/riscv: add rv32i, rv32e and rv64e CPUs	Daniel Henrique Barboza