| Age | Commit message (Expand) | Author |
|---|
| 2023-06-10 | pnv/xive2: Quiet down some error messages | Frederic Barrat |
| 2023-06-10 | pnv/xive2: Handle TIMA access through all ports | Frederic Barrat |
| 2023-06-10 | pnv/xive2: Allow writes to the Physical Thread Enable registers | Frederic Barrat |
| 2023-06-10 | pnv/xive2: Add definition for the ESB cache configuration register | Frederic Barrat |
| 2023-06-10 | pnv/xive2: Add definition for TCTXT Config register | Frederic Barrat |
| 2023-01-20 | include/hw/ppc: Split pnv_chip.h off pnv.h | Markus Armbruster |
| 2022-07-06 | ppc: Define SETFIELD for the ppc target | Alexey Kardashevskiy |
| 2022-06-20 | pnv/xive2: Access direct mapped thread contexts from all chips | Frederic Barrat |
| 2022-05-26 | pnv/xive2: Don't overwrite PC registers when writing TCTXT registers | Frederic Barrat |
| 2022-03-02 | pnv/xive2: Add support for 8bits thread id | Cédric Le Goater |
| 2022-03-02 | pnv/xive2: Add support for automatic save&restore | Cédric Le Goater |
| 2022-03-02 | xive2: Add a get_config() handler for the router configuration | Cédric Le Goater |
| 2022-03-02 | pnv/xive2: Add support XIVE2 P9-compat mode (or Gen1) | Cédric Le Goater |
| 2022-03-02 | ppc/pnv: add XIVE Gen2 TIMA support | Cédric Le Goater |
| 2022-03-02 | pnv/xive2: Introduce new capability bits | Cédric Le Goater |
| 2022-03-02 | ppc/xive: Add support for PQ state bits offload | Cédric Le Goater |
| 2022-03-02 | ppc/pnv: Add a XIVE2 controller to the POWER10 chip | Cédric Le Goater |
