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-rw-r--r--tcg/riscv/tcg-target.c.inc10
1 files changed, 6 insertions, 4 deletions
diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc
index 7bd3b421ad..064a334d82 100644
--- a/tcg/riscv/tcg-target.c.inc
+++ b/tcg/riscv/tcg-target.c.inc
@@ -607,6 +607,11 @@ static void tcg_out_exts_i32_i64(TCGContext *s, TCGReg ret, TCGReg arg)
tcg_out_ext32s(s, ret, arg);
}
+static void tcg_out_extu_i32_i64(TCGContext *s, TCGReg ret, TCGReg arg)
+{
+ tcg_out_ext32u(s, ret, arg);
+}
+
static void tcg_out_ldst(TCGContext *s, RISCVInsn opc, TCGReg data,
TCGReg addr, intptr_t offset)
{
@@ -1602,10 +1607,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
tcg_out_qemu_st(s, args, true);
break;
- case INDEX_op_extu_i32_i64:
- tcg_out_ext32u(s, a0, a1);
- break;
-
case INDEX_op_extrl_i64_i32:
tcg_out_ext32s(s, a0, a1);
break;
@@ -1644,6 +1645,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
case INDEX_op_ext32s_i64:
case INDEX_op_ext32u_i64:
case INDEX_op_ext_i32_i64:
+ case INDEX_op_extu_i32_i64:
default:
g_assert_not_reached();
}