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Diffstat (limited to 'target/mips/cpu.h')
-rw-r--r--target/mips/cpu.h6
1 files changed, 1 insertions, 5 deletions
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index ef26fe03c7..7329226d39 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -747,9 +747,7 @@ typedef struct CPUArchState {
* CP0 Register 9
*/
int32_t CP0_Count;
- uint32_t CP0_SAARI;
#define CP0SAARI_TARGET 0 /* 5..0 */
- uint64_t CP0_SAAR[2];
#define CP0SAAR_BASE 12 /* 43..12 */
#define CP0SAAR_SIZE 1 /* 5..1 */
#define CP0SAAR_EN 0
@@ -1174,7 +1172,6 @@ typedef struct CPUArchState {
uint32_t CP0_Status_rw_bitmask; /* Read/write bits in CP0_Status */
uint32_t CP0_TCStatus_rw_bitmask; /* Read/write bits in CP0_TCStatus */
uint64_t insn_flags; /* Supported instruction set */
- int saarp;
/* Fields up to this point are cleared by a CPU reset */
struct {} end_reset_fields;
@@ -1183,8 +1180,7 @@ typedef struct CPUArchState {
CPUMIPSMVPContext *mvp;
#if !defined(CONFIG_USER_ONLY)
CPUMIPSTLBContext *tlb;
- void *irq[8];
- struct MIPSITUState *itu;
+ qemu_irq irq[8];
MemoryRegion *itc_tag; /* ITC Configuration Tags */
/* Loongson IOCSR memory */