Merge remote-tracking branch 'remotes/stsquad/tags/pull-6.0-rc0-fixed-240321-1' into staging

Various fixes for 6.0:

  - include kernel-doc API reference for plugins
  - fix semihosting SYS_HEAPINFO
  - various tweaks to improve CI runtime
  - more stroz fixes
  - fix iotest CI regressions

# gpg: Signature made Wed 24 Mar 2021 14:28:24 GMT
# gpg:                using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44
# gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full]
# Primary key fingerprint: 6685 AE99 E751 67BC AFC8  DF35 FBD0 DB09 5A9E 2A44

* remotes/stsquad/tags/pull-6.0-rc0-fixed-240321-1: (22 commits)
  gitlab: default to not building the documentation
  iotests: iothreads need ioeventfd
  iotests: test m68k with the virt machine
  iotests: Revert "iotests: use -ccw on s390x for 040, 139, and 182"
  blockdev: with -drive if=virtio, use generic virtio-blk
  m68k: add the virtio devices aliases
  qdev: define list of archs with virtio-pci or virtio-ccw
  gitlab: extend timeouts for CFI builds
  utils: Work around mingw strto*l bug with 0x
  utils: Tighter tests for qemu_strtosz
  cirrus.yml: Update the FreeBSD task to version 12.2
  configure: Don't use the __atomic_*_16 functions for testing 128-bit support
  gitlab-ci.yml: Merge the trace-backend testing into other jobs
  tests/tcg: add HeapInfo checking to semihosting test
  linux-user/riscv: initialise the TaskState heap/stack info
  semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO
  semihosting/arm-compat-semi: unify GET/SET_ARG helpers
  semihosting: move semihosting tests to multiarch
  tools/virtiofsd: include --socket-group in help
  docs/devel: expand style section of memory management
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

1 files changed, 22 insertions, 0 deletions

diff --git a/tests/tcg/riscv64/semicall.h b/tests/tcg/riscv64/semicall.h
new file mode 100644
index 0000000000..f8c88f32dc
--- /dev/null
+++ b/tests/tcg/riscv64/semicall.h
@@ -0,0 +1,22 @@
+/*
+ * Semihosting Tests - RiscV64 Helper
+ *
+ * Copyright (c) 2021
+ * Written by Alex Bennée <alex.bennee@linaro.org>
+ *
+ * SPDX-License-Identifier: GPL-3.0-or-later
+ */
+
+uintptr_t __semi_call(uintptr_t type, uintptr_t arg0)
+{
+    register uintptr_t t asm("a0") = type;
+    register uintptr_t a0 asm("a1") = arg0;
+    asm(".option norvc\n\t"
+        ".balign 16\n\t"
+        "slli zero, zero, 0x1f\n\t"
+        "ebreak\n\t"
+        "srai zero, zero, 0x7\n\t"
+        : "=r" (t)
+        : "r" (t), "r" (a0));
+    return t;
+}