Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-6.2-20211021' into staging

ppc patch queue 2021-10-21

Here's the next batch of ppc target related patches for qemu-6.2.
Highlights are:
 * Some fixes and minimal tests for old embedded ppc platforms
 * The beginnings of PMU emulation in TCG from Daniel Barboza
 * Some improvements to the pegasos2 platform
 * A number of TCG bugfixes from the folks at the El Dorado Institute
 * A few other assorted bugfixes and cleanups

# gpg: Signature made Wed 20 Oct 2021 09:19:04 PM PDT
# gpg:                using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392
# gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" [full]
# gpg:                 aka "David Gibson (kernel.org) <dwg@kernel.org>" [unknown]
# gpg:                 aka "David Gibson (Red Hat) <dgibson@redhat.com>" [full]
# gpg:                 aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" [full]

* remotes/dgibson/tags/ppc-for-6.2-20211021: (25 commits)
  hw/ppc/ppc4xx_pci: Fix ppc4xx_pci_map_irq() for recent Linux kernels
  target/ppc: adding user read/write functions for PMCs
  target/ppc: add user read/write functions for MMCR2
  target/ppc: add user read/write functions for MMCR0
  target/ppc: add MMCR0 PMCC bits to hflags
  target/ppc: Filter mtmsr[d] input before setting MSR
  tests/acceptance: Add a test for the bamboo ppc board
  ppc/pegasos2: Implement power-off RTAS function with VOF
  ppc/pegasos2: Add constants for PCI config addresses
  ppc/pegasos2: Access MV64361 registers via their memory region
  ppc/pegasos2: Implement get-time-of-day RTAS function with VOF
  ppc/pegasos2: Warn when using VOF but no kernel is specified
  ppc/pegasos2: Restrict memory to 2 gigabytes
  target/ppc: Fix XER access in monitor
  linux-user: Fix XER access in ppc version of elf_core_copy_regs
  target/ppc: Fix XER access in gdbstub
  linux-user/ppc: Fix XER access in save/restore_user_regs
  tests/acceptance: Add tests for the ppc405 boards
  hw/ppc: Fix iothread locking in the 405 code
  spapr/xive: Use xive_esb_rw() to trigger interrupts
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

1 files changed, 4 insertions, 4 deletions

diff --git a/hw/intc/xive.c b/hw/intc/xive.c
index 6c82326ec7..190194d27f 100644
--- a/hw/intc/xive.c
+++ b/hw/intc/xive.c
@@ -875,7 +875,7 @@ static bool xive_source_lsi_trigger(XiveSource *xsrc, uint32_t srcno)
 {
     uint8_t old_pq = xive_source_esb_get(xsrc, srcno);
 
-    xsrc->status[srcno] |= XIVE_STATUS_ASSERTED;
+    xive_source_set_asserted(xsrc, srcno, true);
 
     switch (old_pq) {
     case XIVE_ESB_RESET:
@@ -923,7 +923,7 @@ static bool xive_source_esb_eoi(XiveSource *xsrc, uint32_t srcno)
      * notification
      */
     if (xive_source_irq_is_lsi(xsrc, srcno) &&
-        xsrc->status[srcno] & XIVE_STATUS_ASSERTED) {
+        xive_source_is_asserted(xsrc, srcno)) {
         ret = xive_source_lsi_trigger(xsrc, srcno);
     }
 
@@ -1104,7 +1104,7 @@ void xive_source_set_irq(void *opaque, int srcno, int val)
         if (val) {
             notify = xive_source_lsi_trigger(xsrc, srcno);
         } else {
-            xsrc->status[srcno] &= ~XIVE_STATUS_ASSERTED;
+            xive_source_set_asserted(xsrc, srcno, false);
         }
     } else {
         if (val) {
@@ -1133,7 +1133,7 @@ void xive_source_pic_print_info(XiveSource *xsrc, uint32_t offset, Monitor *mon)
                        xive_source_irq_is_lsi(xsrc, i) ? "LSI" : "MSI",
                        pq & XIVE_ESB_VAL_P ? 'P' : '-',
                        pq & XIVE_ESB_VAL_Q ? 'Q' : '-',
-                       xsrc->status[i] & XIVE_STATUS_ASSERTED ? 'A' : ' ');
+                       xive_source_is_asserted(xsrc, i) ? 'A' : ' ');
     }
 }