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authorRichard Henderson <richard.henderson@linaro.org>2021-10-21 08:27:46 -0700
committerRichard Henderson <richard.henderson@linaro.org>2021-10-21 08:27:46 -0700
commite016b58f6ed2e07bde45da7d6792b6c93879a3cf (patch)
treeaf6fd5e9734e012a591e1acf89a187908f16f5bc /hw/intc
parentafc9fcde55296b83f659de9da3cdf044812a6eeb (diff)
parent6f9e8515c106650fbba7222c8f66234c8546c025 (diff)
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-6.2-20211021' into staging
ppc patch queue 2021-10-21 Here's the next batch of ppc target related patches for qemu-6.2. Highlights are: * Some fixes and minimal tests for old embedded ppc platforms * The beginnings of PMU emulation in TCG from Daniel Barboza * Some improvements to the pegasos2 platform * A number of TCG bugfixes from the folks at the El Dorado Institute * A few other assorted bugfixes and cleanups # gpg: Signature made Wed 20 Oct 2021 09:19:04 PM PDT # gpg: using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" [full] # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" [unknown] # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" [full] # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" [full] * remotes/dgibson/tags/ppc-for-6.2-20211021: (25 commits) hw/ppc/ppc4xx_pci: Fix ppc4xx_pci_map_irq() for recent Linux kernels target/ppc: adding user read/write functions for PMCs target/ppc: add user read/write functions for MMCR2 target/ppc: add user read/write functions for MMCR0 target/ppc: add MMCR0 PMCC bits to hflags target/ppc: Filter mtmsr[d] input before setting MSR tests/acceptance: Add a test for the bamboo ppc board ppc/pegasos2: Implement power-off RTAS function with VOF ppc/pegasos2: Add constants for PCI config addresses ppc/pegasos2: Access MV64361 registers via their memory region ppc/pegasos2: Implement get-time-of-day RTAS function with VOF ppc/pegasos2: Warn when using VOF but no kernel is specified ppc/pegasos2: Restrict memory to 2 gigabytes target/ppc: Fix XER access in monitor linux-user: Fix XER access in ppc version of elf_core_copy_regs target/ppc: Fix XER access in gdbstub linux-user/ppc: Fix XER access in save/restore_user_regs tests/acceptance: Add tests for the ppc405 boards hw/ppc: Fix iothread locking in the 405 code spapr/xive: Use xive_esb_rw() to trigger interrupts ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'hw/intc')
-rw-r--r--hw/intc/spapr_xive.c2
-rw-r--r--hw/intc/spapr_xive_kvm.c14
-rw-r--r--hw/intc/xive.c8
3 files changed, 9 insertions, 15 deletions
diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c
index 89cfa018f5..4ec659b93e 100644
--- a/hw/intc/spapr_xive.c
+++ b/hw/intc/spapr_xive.c
@@ -185,7 +185,7 @@ static void spapr_xive_pic_print_info(SpaprXive *xive, Monitor *mon)
xive_source_irq_is_lsi(xsrc, i) ? "LSI" : "MSI",
pq & XIVE_ESB_VAL_P ? 'P' : '-',
pq & XIVE_ESB_VAL_Q ? 'Q' : '-',
- xsrc->status[i] & XIVE_STATUS_ASSERTED ? 'A' : ' ',
+ xive_source_is_asserted(xsrc, i) ? 'A' : ' ',
xive_eas_is_masked(eas) ? "M" : " ",
(int) xive_get_field64(EAS_END_DATA, eas->w));
diff --git a/hw/intc/spapr_xive_kvm.c b/hw/intc/spapr_xive_kvm.c
index 6d4909d0a8..61fe7bd2d3 100644
--- a/hw/intc/spapr_xive_kvm.c
+++ b/hw/intc/spapr_xive_kvm.c
@@ -242,7 +242,7 @@ int kvmppc_xive_source_reset_one(XiveSource *xsrc, int srcno, Error **errp)
if (xive_source_irq_is_lsi(xsrc, srcno)) {
state |= KVM_XIVE_LEVEL_SENSITIVE;
- if (xsrc->status[srcno] & XIVE_STATUS_ASSERTED) {
+ if (xive_source_is_asserted(xsrc, srcno)) {
state |= KVM_XIVE_LEVEL_ASSERTED;
}
}
@@ -301,9 +301,7 @@ static uint8_t xive_esb_read(XiveSource *xsrc, int srcno, uint32_t offset)
static void kvmppc_xive_esb_trigger(XiveSource *xsrc, int srcno)
{
- uint64_t *addr = xsrc->esb_mmap + xive_source_esb_page(xsrc, srcno);
-
- *addr = 0x0;
+ xive_esb_rw(xsrc, srcno, 0, 0, true);
}
uint64_t kvmppc_xive_esb_rw(XiveSource *xsrc, int srcno, uint32_t offset,
@@ -321,7 +319,7 @@ uint64_t kvmppc_xive_esb_rw(XiveSource *xsrc, int srcno, uint32_t offset,
if (xive_source_irq_is_lsi(xsrc, srcno) &&
offset == XIVE_ESB_LOAD_EOI) {
xive_esb_read(xsrc, srcno, XIVE_ESB_SET_PQ_00);
- if (xsrc->status[srcno] & XIVE_STATUS_ASSERTED) {
+ if (xive_source_is_asserted(xsrc, srcno)) {
kvmppc_xive_esb_trigger(xsrc, srcno);
}
return 0;
@@ -359,11 +357,7 @@ void kvmppc_xive_source_set_irq(void *opaque, int srcno, int val)
return;
}
} else {
- if (val) {
- xsrc->status[srcno] |= XIVE_STATUS_ASSERTED;
- } else {
- xsrc->status[srcno] &= ~XIVE_STATUS_ASSERTED;
- }
+ xive_source_set_asserted(xsrc, srcno, val);
}
kvmppc_xive_esb_trigger(xsrc, srcno);
diff --git a/hw/intc/xive.c b/hw/intc/xive.c
index 6c82326ec7..190194d27f 100644
--- a/hw/intc/xive.c
+++ b/hw/intc/xive.c
@@ -875,7 +875,7 @@ static bool xive_source_lsi_trigger(XiveSource *xsrc, uint32_t srcno)
{
uint8_t old_pq = xive_source_esb_get(xsrc, srcno);
- xsrc->status[srcno] |= XIVE_STATUS_ASSERTED;
+ xive_source_set_asserted(xsrc, srcno, true);
switch (old_pq) {
case XIVE_ESB_RESET:
@@ -923,7 +923,7 @@ static bool xive_source_esb_eoi(XiveSource *xsrc, uint32_t srcno)
* notification
*/
if (xive_source_irq_is_lsi(xsrc, srcno) &&
- xsrc->status[srcno] & XIVE_STATUS_ASSERTED) {
+ xive_source_is_asserted(xsrc, srcno)) {
ret = xive_source_lsi_trigger(xsrc, srcno);
}
@@ -1104,7 +1104,7 @@ void xive_source_set_irq(void *opaque, int srcno, int val)
if (val) {
notify = xive_source_lsi_trigger(xsrc, srcno);
} else {
- xsrc->status[srcno] &= ~XIVE_STATUS_ASSERTED;
+ xive_source_set_asserted(xsrc, srcno, false);
}
} else {
if (val) {
@@ -1133,7 +1133,7 @@ void xive_source_pic_print_info(XiveSource *xsrc, uint32_t offset, Monitor *mon)
xive_source_irq_is_lsi(xsrc, i) ? "LSI" : "MSI",
pq & XIVE_ESB_VAL_P ? 'P' : '-',
pq & XIVE_ESB_VAL_Q ? 'Q' : '-',
- xsrc->status[i] & XIVE_STATUS_ASSERTED ? 'A' : ' ');
+ xive_source_is_asserted(xsrc, i) ? 'A' : ' ');
}
}