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authorHervé Poussineau <hpoussin@reactos.org>2011-01-02 19:44:49 +0100
committerAurelien Jarno <aurelien@aurel32.net>2011-01-16 22:15:58 +0100
commit51f9b84e759c692575542627dd8d39ae216ac521 (patch)
tree797be7415ea76c2383a150c04f7b196ac18de3f8
parente2af15b2ad57d3c61b79c8aea0871e3a00264e96 (diff)
m48t59: Fix a wrong opaque passed to nvram read and write routines
This fixes boot on PPC prep. Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
-rw-r--r--hw/m48t59.c11
1 files changed, 6 insertions, 5 deletions
diff --git a/hw/m48t59.c b/hw/m48t59.c
index 6991e2e8e1..2020487bbe 100644
--- a/hw/m48t59.c
+++ b/hw/m48t59.c
@@ -642,6 +642,7 @@ M48t59State *m48t59_init(qemu_irq IRQ, target_phys_addr_t mem_base,
DeviceState *dev;
SysBusDevice *s;
M48t59SysBusState *d;
+ M48t59State *state;
dev = qdev_create(NULL, "m48t59");
qdev_prop_set_uint32(dev, "type", type);
@@ -649,18 +650,18 @@ M48t59State *m48t59_init(qemu_irq IRQ, target_phys_addr_t mem_base,
qdev_prop_set_uint32(dev, "io_base", io_base);
qdev_init_nofail(dev);
s = sysbus_from_qdev(dev);
+ d = FROM_SYSBUS(M48t59SysBusState, s);
+ state = &d->state;
sysbus_connect_irq(s, 0, IRQ);
if (io_base != 0) {
- register_ioport_read(io_base, 0x04, 1, NVRAM_readb, s);
- register_ioport_write(io_base, 0x04, 1, NVRAM_writeb, s);
+ register_ioport_read(io_base, 0x04, 1, NVRAM_readb, state);
+ register_ioport_write(io_base, 0x04, 1, NVRAM_writeb, state);
}
if (mem_base != 0) {
sysbus_mmio_map(s, 0, mem_base);
}
- d = FROM_SYSBUS(M48t59SysBusState, s);
-
- return &d->state;
+ return state;
}
M48t59State *m48t59_init_isa(uint32_t io_base, uint16_t size, int type)