diff options
author | Philippe Mathieu-Daudé <philmd@linaro.org> | 2023-08-31 22:06:57 +0200 |
---|---|---|
committer | Philippe Mathieu-Daudé <philmd@linaro.org> | 2024-11-03 05:49:12 -0300 |
commit | 127da643c4bd84131bcc79169561848d9de80377 (patch) | |
tree | 2c4baa1ede1d109a6fdd80e97aedea616024766e | |
parent | 1b63c0b7a5879f7bbea4740697932706446b1ad9 (diff) |
target/mips: Simplify Loongson MULTU.G opcode
Since MULTU opcodes don't record the most significant bits
of the infinite result, sign-extending the sources make no
difference in the result.
Once we remove the sign extension of source registers, MULT
and MULTU are identical (as are DMULT and DMULTU).
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20241026175349.84523-3-philmd@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
-rw-r--r-- | target/mips/tcg/translate.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c index 6c881af561..6d7e913263 100644 --- a/target/mips/tcg/translate.c +++ b/target/mips/tcg/translate.c @@ -3615,8 +3615,6 @@ static void gen_loongson_integer(DisasContext *ctx, uint32_t opc, break; case OPC_MULTU_G_2E: case OPC_MULTU_G_2F: - tcg_gen_ext32u_tl(t0, t0); - tcg_gen_ext32u_tl(t1, t1); tcg_gen_mul_tl(cpu_gpr[rd], t0, t1); tcg_gen_ext32s_tl(cpu_gpr[rd], cpu_gpr[rd]); break; |