development/cocotb: Added (verify VHDL and SystemVerilog RTL)

Signed-off-by: Willy Sudiarto Raharjo <willysr@slackbuilds.org>

1 files changed, 19 insertions, 0 deletions

diff --git a/development/cocotb/slack-desc b/development/cocotb/slack-desc
new file mode 100644
index 000000000000..8f3c03f36208
--- /dev/null
+++ b/development/cocotb/slack-desc
@@ -0,0 +1,19 @@
+# HOW TO EDIT THIS FILE:
+# The "handy ruler" below makes it easier to edit a package description.
+# Line up the first '|' above the ':' following the base package name, and
+# the '|' on the right side marks the last column you can put a character in.
+# You must make exactly 11 lines for the formatting to be correct.  It's also
+# customary to leave one space after the ':' except on otherwise blank lines.
+
+      |-----handy-ruler------------------------------------------------------|
+cocotb: cocotb (tool for verifying VHDL and SystemVerilog RTL using Python)
+cocotb:
+cocotb:
+cocotb:
+cocotb:   cocotb is an open source coroutine-based cosimulation testbench
+cocotb: environment for verifying VHDL and SystemVerilog RTL using Python.
+cocotb:
+cocotb:
+cocotb:
+cocotb:
+cocotb: