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QEMU is a generic and open source machine & userspace emulator and virtualizer
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2024-10-30
target/riscv: zicfilp `lpad` impl and branch tracking
Deepak Gupta
2024-10-30
target/riscv: tracking indirect branches (fcfi) for zicfilp
Deepak Gupta
2024-10-30
target/riscv: additional code information for sw check
Deepak Gupta
2024-10-30
target/riscv: save and restore elp state on priv transitions
Deepak Gupta
2024-10-30
target/riscv: Introduce elp state and enabling controls for zicfilp
Deepak Gupta
2024-10-30
target/riscv: Add zicfilp extension
Deepak Gupta
2024-10-30
target/riscv: expose *envcfg csr and priv to qemu-user as well
Deepak Gupta
2024-10-30
target/riscv: Set vtype.vill on CPU reset
Rob Bradford
2024-10-30
target/riscv: Add max32 CPU for RV64 QEMU
LIU Zhiwei
2024-10-30
target/riscv: Enable RV32 CPU support in RV64 QEMU
TANG Tiancheng
2024-10-30
target/riscv: Correct mcause/scause bit width for RV32 in RV64 QEMU
TANG Tiancheng
2024-10-30
target/riscv: Detect sxl to set bit width for RV32 in RV64
TANG Tiancheng
2024-10-30
target/riscv: Correct SXL return value for RV32 in RV64 QEMU
TANG Tiancheng
2024-10-30
target/riscv: Adjust PMP size for no-MMU RV64 QEMU running RV32
TANG Tiancheng
2024-10-30
target/riscv/csr.c: Fix an access to VXSAT
Evgenii Prokopiev
2024-10-29
target/arm: kvm: require KVM_CAP_DEVICE_CTRL
Paolo Bonzini
2024-10-29
target/arm: Fix arithmetic underflow in SETM instruction
Ido Plat
2024-10-29
target/arm: Don't assert in regime_is_user() for E10 mmuidx values
Peter Maydell
2024-10-29
target/arm: Store FPSR cumulative exception bits in env->vfp.fpsr
Peter Maydell
2024-10-29
arm/kvm: add support for MTE
Cornelia Huck
2024-10-24
Merge tag 'pull-request-2024-10-23' of https://gitlab.com/thuth/qemu into sta...
Peter Maydell
2024-10-23
s390x: Rebuild IPLB for SCSI device directly from DIAG308
Jared Rossi
2024-10-22
target/i386: Remove ra parameter from ptw_translate
Richard Henderson
2024-10-22
target/i386: Use probe_access_full_mmu in ptw_translate
Richard Henderson
2024-10-22
target/i386: Walk NPT in guest real mode
Alexander Graf
2024-10-18
Merge tag 'pull-error-2024-10-18' of https://repo.or.cz/qemu/armbru into staging
Peter Maydell
2024-10-18
target/i386/cpu: Improve errors for out of bounds property values
Markus Armbruster
2024-10-18
target/i386/cpu: Avoid mixing signed and unsigned in property setters
Markus Armbruster
2024-10-18
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
Peter Maydell
2024-10-17
target/i386: Use only 16 and 32-bit operands for IN/OUT
Richard Henderson
2024-10-17
target/i386/tcg: Use DPL-level accesses for interrupts and call gates
Paolo Bonzini
2024-10-17
target/i386: assert that cc_op* and pc_save are preserved
Paolo Bonzini
2024-10-17
target/i386: list instructions still in translate.c
Paolo Bonzini
2024-10-17
target/i386: do not check PREFIX_LOCK in old-style decoder
Paolo Bonzini
2024-10-17
target/i386: convert CMPXCHG8B/CMPXCHG16B to new decoder
Paolo Bonzini
2024-10-17
target/i386: decode address before going back to translate.c
Paolo Bonzini
2024-10-17
target/i386: convert bit test instructions to new decoder
Paolo Bonzini
2024-10-17
Merge tag 'pull-loongarch-20241016' of https://gitlab.com/gaosong/qemu into s...
Peter Maydell
2024-10-17
target/i386: Make sure SynIC state is really updated before KVM_RUN
Vitaly Kuznetsov
2024-10-17
target/i386: Exclude 'hv-syndbg' from 'hv-passthrough'
Vitaly Kuznetsov
2024-10-17
target/i386: Fix conditional CONFIG_SYNDBG enablement
Vitaly Kuznetsov
2024-10-17
target/i386: Add support save/load HWCR MSR
Gao Shiyuan
2024-10-17
target/i386: Add more features enumerated by CPUID.7.2.EDX
Chao Gao
2024-10-17
target/i386: Make invtsc migratable when user sets tsc-khz explicitly
Xiaoyao Li
2024-10-17
target/i386: Construct CPUID 2 as stateful iff times > 1
Xiaoyao Li
2024-10-17
target/i386: Enable fdp-excptn-only and zero-fcs-fds
Xiaoyao Li
2024-10-17
target/i386: Don't construct a all-zero entry for CPUID[0xD 0x3f]
Xiaoyao Li
2024-10-16
target/loongarch: Avoid bits shift exceeding width of bool type
Bibo Mao
2024-10-15
hw/mips: Have mips_cpu_create_with_clock() take an endianness argument
Philippe Mathieu-Daudé
2024-10-15
target/mips: Expose MIPSCPU::is_big_endian property
Philippe Mathieu-Daudé
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