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2024-10-31Merge tag 'pull-riscv-to-apply-20241031-1' of https://github.com/alistair23/q...Peter Maydell
2024-10-31target/riscv: Fix vcompress with rvv_ta_all_1sAnton Blanchard
2024-10-31target/riscv/kvm: clarify how 'riscv-aia' default worksDaniel Henrique Barboza
2024-10-31target/riscv/kvm: set 'aia_mode' to default in error pathDaniel Henrique Barboza
2024-10-31target/riscv: Expose zicfiss extension as a cpu propertyDeepak Gupta
2024-10-30target/riscv: compressed encodings for sspush and sspopchkDeepak Gupta
2024-10-30target/riscv: implement zicfiss instructionsDeepak Gupta
2024-10-30target/riscv: update `decode_save_opc` to store extra word2Deepak Gupta
2024-10-30target/riscv: AMO operations always raise store/AMO faultDeepak Gupta
2024-10-30target/riscv: mmu changes for zicfiss shadow stack protectionDeepak Gupta
2024-10-30target/riscv: tb flag for shadow stack instructionsDeepak Gupta
2024-10-30target/riscv: introduce ssp and enabling controls for zicfissDeepak Gupta
2024-10-30target/riscv: Add zicfiss extensionDeepak Gupta
2024-10-30target/riscv: Expose zicfilp extension as a cpu propertyDeepak Gupta
2024-10-30target/riscv: zicfilp `lpad` impl and branch trackingDeepak Gupta
2024-10-30target/riscv: tracking indirect branches (fcfi) for zicfilpDeepak Gupta
2024-10-30target/riscv: additional code information for sw checkDeepak Gupta
2024-10-30target/riscv: save and restore elp state on priv transitionsDeepak Gupta
2024-10-30target/riscv: Introduce elp state and enabling controls for zicfilpDeepak Gupta
2024-10-30target/riscv: Add zicfilp extensionDeepak Gupta
2024-10-30target/riscv: expose *envcfg csr and priv to qemu-user as wellDeepak Gupta
2024-10-30target/riscv: Set vtype.vill on CPU resetRob Bradford
2024-10-30target/riscv: Add max32 CPU for RV64 QEMULIU Zhiwei
2024-10-30target/riscv: Enable RV32 CPU support in RV64 QEMUTANG Tiancheng
2024-10-30target/riscv: Correct mcause/scause bit width for RV32 in RV64 QEMUTANG Tiancheng
2024-10-30target/riscv: Detect sxl to set bit width for RV32 in RV64TANG Tiancheng
2024-10-30target/riscv: Correct SXL return value for RV32 in RV64 QEMUTANG Tiancheng
2024-10-30target/riscv: Adjust PMP size for no-MMU RV64 QEMU running RV32TANG Tiancheng
2024-10-30target/riscv/csr.c: Fix an access to VXSATEvgenii Prokopiev
2024-10-29target/arm: kvm: require KVM_CAP_DEVICE_CTRLPaolo Bonzini
2024-10-29target/arm: Fix arithmetic underflow in SETM instructionIdo Plat
2024-10-29target/arm: Don't assert in regime_is_user() for E10 mmuidx valuesPeter Maydell
2024-10-29target/arm: Store FPSR cumulative exception bits in env->vfp.fpsrPeter Maydell
2024-10-29arm/kvm: add support for MTECornelia Huck
2024-10-24Merge tag 'pull-request-2024-10-23' of https://gitlab.com/thuth/qemu into sta...Peter Maydell
2024-10-23s390x: Rebuild IPLB for SCSI device directly from DIAG308Jared Rossi
2024-10-22target/i386: Remove ra parameter from ptw_translateRichard Henderson
2024-10-22target/i386: Use probe_access_full_mmu in ptw_translateRichard Henderson
2024-10-22target/i386: Walk NPT in guest real modeAlexander Graf
2024-10-18Merge tag 'pull-error-2024-10-18' of https://repo.or.cz/qemu/armbru into stagingPeter Maydell
2024-10-18target/i386/cpu: Improve errors for out of bounds property valuesMarkus Armbruster
2024-10-18target/i386/cpu: Avoid mixing signed and unsigned in property settersMarkus Armbruster
2024-10-18Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into stagingPeter Maydell
2024-10-17target/i386: Use only 16 and 32-bit operands for IN/OUTRichard Henderson
2024-10-17target/i386/tcg: Use DPL-level accesses for interrupts and call gatesPaolo Bonzini
2024-10-17target/i386: assert that cc_op* and pc_save are preservedPaolo Bonzini
2024-10-17target/i386: list instructions still in translate.cPaolo Bonzini
2024-10-17target/i386: do not check PREFIX_LOCK in old-style decoderPaolo Bonzini
2024-10-17target/i386: convert CMPXCHG8B/CMPXCHG16B to new decoderPaolo Bonzini
2024-10-17target/i386: decode address before going back to translate.cPaolo Bonzini