aboutsummaryrefslogtreecommitdiff
path: root/target
AgeCommit message (Expand)Author
2024-02-14Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu ...Peter Maydell
2024-02-14target/i386/cpu: Fix typo in commentBernhard Beschow
2024-02-14apic, i386/tcg: add x2apic transitionsBui Quang Minh
2024-02-14apic: add support for x2APIC modeBui Quang Minh
2024-02-14i386/tcg: implement x2APIC registers MSR accessBui Quang Minh
2024-02-13Merge tag 'hppa64-pull-request' of https://github.com/hdeller/qemu-hppa into ...Peter Maydell
2024-02-12Merge tag 'pull-maintainer-updates-090224-1' of https://gitlab.com/stsquad/qe...Peter Maydell
2024-02-11target/hppa: PDC_BTLB_INFO uses 32-bit intsHelge Deller
2024-02-11target/hppa: Allow read-access to PSW with rsm 0,reg instructionHelge Deller
2024-02-11target/hppa: Implement do_transaction_failed handler for I/O errorsHelge Deller
2024-02-11target/hppa: Add "diag 0x101" for console output supportHelge Deller
2024-02-09kconfig: use "select" to enable semihostingPaolo Bonzini
2024-02-09target/riscv: add rv32i, rv32e and rv64e CPUsDaniel Henrique Barboza
2024-02-09target/riscv/cpu.c: add riscv_bare_cpu_init()Daniel Henrique Barboza
2024-02-09target/riscv: Enable xtheadsync under user modeLIU Zhiwei
2024-02-09target/riscv: support new isa extension detection devicetree propertiesConor Dooley
2024-02-09target/riscv: use misa_mxl_max to populate isa string rather than TARGET_LONG...Conor Dooley
2024-02-09target/riscv: Expose Zaamo and Zalrsc extensionsRob Bradford
2024-02-09target/riscv: Check 'A' and split extensions for atomic instructionsRob Bradford
2024-02-09target/riscv: Add Zaamo and Zalrsc extension infrastructureRob Bradford
2024-02-09target/riscv: Use RISCVException as return type for all csr opsLIU Zhiwei
2024-02-09target/riscv: FCSR doesn't contain vxrm and vxsatLIU Zhiwei
2024-02-09target/riscv: Validate misa_mxl_max only onceAkihiko Odaki
2024-02-09target/riscv: Move misa_mxl_max to classAkihiko Odaki
2024-02-09target/riscv: Remove misa_mxl validationAkihiko Odaki
2024-02-09target/riscv/kvm: get/set vector vregs[]Daniel Henrique Barboza
2024-02-09target/riscv/kvm: initialize 'vlenb' via get-reg-listDaniel Henrique Barboza
2024-02-09target/riscv/kvm: change kvm_reg_id to uint64_tDaniel Henrique Barboza
2024-02-09target/riscv/cpu.c: remove cpu->cfg.vlenDaniel Henrique Barboza
2024-02-09trans_rvv.c.inc: use vext_get_vlmax() in trans_vrgather_v*()Daniel Henrique Barboza
2024-02-09target/riscv: change vext_get_vlmax() argumentsDaniel Henrique Barboza
2024-02-09target/riscv/cpu.h: use 'vlenb' in vext_get_vlmax()Daniel Henrique Barboza
2024-02-09target/riscv/insn_trans/trans_rvv.c.inc: use 'vlenb' in MAXSZ()Daniel Henrique Barboza
2024-02-09target/riscv/vector_helper.c: use vlenb in HELPER(vsetvl)Daniel Henrique Barboza
2024-02-09target/riscv/vector_helper.c: use 'vlenb'Daniel Henrique Barboza
2024-02-09target/riscv/insn_trans/trans_rvvk.c.inc: use 'vlenb'Daniel Henrique Barboza
2024-02-09target/riscv/insn_trans/trans_rvv.c.inc: use 'vlenb'Daniel Henrique Barboza
2024-02-09target/riscv/insn_trans/trans_rvbf16.c.inc: use cpu->cfg.vlenbDaniel Henrique Barboza
2024-02-09target/riscv/gdbstub.c: use 'vlenb' instead of shifting 'vlen'Daniel Henrique Barboza
2024-02-09target/riscv/csr.c: use 'vlenb' instead of 'vlen'Daniel Henrique Barboza
2024-02-09target/riscv: add 'vlenb' field in cpu->cfgDaniel Henrique Barboza
2024-02-09target/riscv: Implement optional CSR mcontext of debug Sdtrig extensionAlvin Chang
2024-02-09target/riscv/cpu.c: move 'marchid' to riscv_cpu_properties[]Daniel Henrique Barboza
2024-02-09target/riscv/cpu.c: move 'mimpid' to riscv_cpu_properties[]Daniel Henrique Barboza
2024-02-09target/riscv/cpu.c: move 'mvendorid' to riscv_cpu_properties[]Daniel Henrique Barboza
2024-02-09target/riscv: remove riscv_cpu_options[]Daniel Henrique Barboza
2024-02-09target/riscv: move 'cboz_blocksize' to riscv_cpu_properties[]Daniel Henrique Barboza
2024-02-09target/riscv: move 'cbop_blocksize' to riscv_cpu_properties[]Daniel Henrique Barboza
2024-02-09target/riscv: move 'cbom_blocksize' to riscv_cpu_properties[]Daniel Henrique Barboza
2024-02-09target/riscv: create finalize_features() for KVMDaniel Henrique Barboza