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AgeCommit message (Expand)Author
2021-09-01target-arm: Add support for Fujitsu A64FXShuuichirou Ishii
2021-09-01target/arm: Enable MVE in Cortex-M55Peter Maydell
2021-09-01target/arm: Implement MVE VRINT insnsPeter Maydell
2021-09-01target/arm: Implement MVE VCVT between single and half precisionPeter Maydell
2021-09-01target/arm: Implement MVE VCVT with specified rounding modePeter Maydell
2021-09-01target/arm: Implement MVE VCVT between fp and integerPeter Maydell
2021-09-01target/arm: Implement MVE VCVT between floating and fixed pointPeter Maydell
2021-09-01target/arm: Implement MVE fp scalar comparisonsPeter Maydell
2021-09-01target/arm: Implement MVE fp vector comparisonsPeter Maydell
2021-09-01target/arm: Implement MVE FP max/min across vectorPeter Maydell
2021-09-01target/arm: Implement MVE fp-with-scalar VFMA, VFMASPeter Maydell
2021-09-01target/arm: Implement MVE scalar fp insnsPeter Maydell
2021-09-01target/arm: Implement MVE VMAXNMA and VMINNMAPeter Maydell
2021-09-01target/arm: Implement MVE VCMUL and VCMLAPeter Maydell
2021-09-01target/arm: Implement MVE VFMA and VFMSPeter Maydell
2021-09-01target/arm: Implement MVE VCADDPeter Maydell
2021-09-01target/arm: Implement MVE VSUB, VMUL, VABD, VMAXNM, VMINNMPeter Maydell
2021-09-01target/arm: Implement MVE VADD (floating-point)Peter Maydell
2021-09-01target/riscv: Use {get,dest}_gpr for RVVRichard Henderson
2021-09-01target/riscv: Tidy trans_rvh.c.incRichard Henderson
2021-09-01target/riscv: Use {get,dest}_gpr for RVDRichard Henderson
2021-09-01target/riscv: Use {get,dest}_gpr for RVFRichard Henderson
2021-09-01target/riscv: Use gen_shift_imm_fn for slli_uwRichard Henderson
2021-09-01target/riscv: Use {get,dest}_gpr for RVARichard Henderson
2021-09-01target/riscv: Reorg csr instructionsRichard Henderson
2021-09-01target/riscv: Fix hgeie, hgeipRichard Henderson
2021-09-01target/riscv: Fix rmw_sip, rmw_vsip, rmw_hsip vs write-only operationRichard Henderson
2021-09-01target/riscv: Use {get, dest}_gpr for integer load/storeRichard Henderson
2021-09-01target/riscv: Use get_gpr in branchesRichard Henderson
2021-09-01target/riscv: Use extracts for sraiw and srliwRichard Henderson
2021-09-01target/riscv: Use DisasExtend in shift operationsRichard Henderson
2021-09-01target/riscv: Add DisasExtend to gen_unaryRichard Henderson
2021-09-01target/riscv: Move gen_* helpers for RVBRichard Henderson
2021-09-01target/riscv: Move gen_* helpers for RVMRichard Henderson
2021-09-01target/riscv: Use gen_arith for mulh and mulhuRichard Henderson
2021-09-01target/riscv: Remove gen_arith_div*Richard Henderson
2021-09-01target/riscv: Add DisasExtend to gen_arith*Richard Henderson
2021-09-01target/riscv: Introduce DisasExtend and new helpersRichard Henderson
2021-09-01target/riscv: Add DisasContext to gen_get_gpr, gen_set_gprRichard Henderson
2021-09-01target/riscv: Clean up division helpersRichard Henderson
2021-09-01target/riscv: Use tcg_constant_*Richard Henderson
2021-09-01target/riscv: Add User CSRs read-only checkLIU Zhiwei
2021-09-01target/riscv: Don't wrongly override isa versionLIU Zhiwei
2021-09-01target/riscv: Correct a comment in riscv_csrrw()Bin Meng
2021-08-27Merge remote-tracking branch 'remotes/dg-gitlab/tags/ppc-for-6.2-20210827' in...Peter Maydell
2021-08-27Merge remote-tracking branch 'remotes/armbru/tags/pull-error-2021-08-26' into...Peter Maydell
2021-08-27target/ppc: fix vector registers access in gdbstub for little-endianMatheus Ferst
2021-08-27target/ppc: fix vextu[bhw][lr]x helpersMatheus Ferst
2021-08-27ppc/pnv: powerpc_excp: Do not discard HDECR exception when entering power-sav...Cédric Le Goater
2021-08-27ppc: Add a POWER10 DD2 CPUCédric Le Goater