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QEMU is a generic and open source machine & userspace emulator and virtualizer
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xtensa
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2021-05-20
target/xtensa: clean up unaligned access
Max Filippov
2021-05-20
target/xtensa: fix access ring in l32ex
Max Filippov
2021-05-20
target/xtensa: don't generate extra EXCP_DEBUG on exception
Max Filippov
2021-05-20
target/xtensa: Make sure that tb->size != 0
Ilya Leoshkevich
2021-05-02
Do not include exec/address-spaces.h if it's not really necessary
Thomas Huth
2021-04-03
target/xtensa: make xtensa_modules static on import
Max Filippov
2021-04-03
target/xtensa: fix meson.build rule for xtensa cores
Max Filippov
2021-03-10
semihosting: Move include/hw/semihosting/ -> include/semihosting/
Philippe Mathieu-Daudé
2021-02-05
cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass
Claudio Fontana
2021-02-05
cpu: move do_unaligned_access to tcg_ops
Claudio Fontana
2021-02-05
cpu: move cc->transaction_failed to tcg_ops
Claudio Fontana
2021-02-05
cpu: move cc->do_interrupt to tcg_ops
Claudio Fontana
2021-02-05
cpu: Move debug_excp_handler to tcg_ops
Eduardo Habkost
2021-02-05
cpu: Move tlb_fill to tcg_ops
Eduardo Habkost
2021-02-05
cpu: Move cpu_exec_* to tcg_ops
Eduardo Habkost
2021-02-05
cpu: Introduce TCGCpuOperations struct
Eduardo Habkost
2020-11-15
xtensa tcg cpus: Fix Lesser GPL version number
Chetan Pant
2020-11-13
hmp: Pass monitor to mon_get_cpu_env()
Kevin Wolf
2020-10-26
target/xtensa: enable all coprocessors for linux-user
Max Filippov
2020-09-23
qemu/atomic.h: rename atomic_ to qatomic_
Stefan Hajnoczi
2020-09-18
qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros
Eduardo Habkost
2020-09-09
Use OBJECT_DECLARE_TYPE where possible
Eduardo Habkost
2020-09-09
Use DECLARE_*CHECKER* macros
Eduardo Habkost
2020-09-09
Move QOM typedefs and add missing includes
Eduardo Habkost
2020-08-21
target/xtensa: import DSP3400 core
Max Filippov
2020-08-21
target/xtensa: import de233_fpu core
Max Filippov
2020-08-21
target/xtensa: implement FPU division and square root
Max Filippov
2020-08-21
target/xtensa: add DFPU registers and opcodes
Max Filippov
2020-08-21
target/xtensa: add DFPU option
Max Filippov
2020-08-21
target/xtensa: don't access BR regfile directly
Max Filippov
2020-08-21
target/xtensa: move FSR/FCR register accessors
Max Filippov
2020-08-21
target/xtensa: rename FPU2000 translators and helpers
Max Filippov
2020-08-21
target/xtensa: support copying registers up to 64 bits wide
Max Filippov
2020-08-21
target/xtensa: add geometry to xtensa_get_regfile_by_name
Max Filippov
2020-08-21
target/xtensa: implement NMI support
Max Filippov
2020-08-21
target/xtensa: make opcode properties more dynamic
Max Filippov
2020-08-21
meson: target
Paolo Bonzini
2020-08-21
meson: rename included C source files to .c.inc
Paolo Bonzini
2020-06-25
Merge remote-tracking branch 'remotes/xtensa/tags/20200625-xtensa' into staging
Peter Maydell
2020-06-22
target/xtensa: drop gen_io_end call
Max Filippov
2020-05-19
softfloat: Name compare relation enum
Richard Henderson
2020-05-17
target/xtensa: fix simcall for newer hardware
Max Filippov
2020-05-17
target/xtensa: fetch HW version from configuration overlay
Max Filippov
2020-04-30
target/xtensa: work around missing SR definitions
Max Filippov
2020-04-15
gdbstub: Do not use memset() on GByteArray
Philippe Mathieu-Daudé
2020-04-07
target/xtensa: statically allocate xtensa_insnbufs in DisasContext
Max Filippov
2020-04-07
target/xtensa: fix pasto in pfwait.r opcode name
Max Filippov
2020-04-07
target/xtensa: add FIXME for translation memory leak
Alex Bennée
2020-03-19
Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-requ...
Peter Maydell
2020-03-17
cpu: Use DeviceClass reset instead of a special CPUClass reset
Peter Maydell
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