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AgeCommit message (Expand)Author
2023-07-06target/xtensa: Assert that interrupt level is within boundsPeter Maydell
2023-06-26target: Widen pc/cs_base in cpu_get_tb_cpu_stateAnton Johansson
2023-06-20meson: Replace softmmu_ss -> system_ssPhilippe Mathieu-Daudé
2023-06-05accel/tcg: Introduce translator_io_startRichard Henderson
2023-06-05tcg: Pass TCGHelperInfo to tcg_gen_callNRichard Henderson
2023-05-05target/xtensa: Finish conversion to tcg_gen_qemu_{ld, st}_*Richard Henderson
2023-03-13target/xtensa: Remove `NB_MMU_MODES` defineAnton Johansson
2023-03-07gdbstub: move register helpers into standalone includeAlex Bennée
2023-03-05target/xtensa: Avoid tcg_const_i32Richard Henderson
2023-03-05target/xtensa: Split constant in bit shiftRichard Henderson
2023-03-05target/xtensa: Use tcg_gen_subfi_i32 in translate_sllRichard Henderson
2023-03-05target/xtensa: Avoid tcg_const_i32 in translate_l32rRichard Henderson
2023-03-05target/xtensa: Tidy translate_clampsRichard Henderson
2023-03-05target/xtensa: Tidy translate_bbRichard Henderson
2023-03-05target/xtensa: Drop tcg_temp_freeRichard Henderson
2023-03-05target/xtensa: Drop reset_sar_trackerRichard Henderson
2023-03-01target/xtensa: Don't use tcg_temp_local_new_*Richard Henderson
2023-03-01accel/tcg: Pass max_insn to gen_intermediate_code by pointerRichard Henderson
2023-02-27target/xtensa/cpu: Include missing "memory.h" headerPhilippe Mathieu-Daudé
2023-02-27target/cpu: Restrict cpu_get_phys_page_debug() handlers to sysemuPhilippe Mathieu-Daudé
2022-12-16target/xtensa: Convert to 3-phase resetPeter Maydell
2022-11-01accel/tcg: Remove will_exit argument from cpu_restore_stateRichard Henderson
2022-10-26target/xtensa: Convert to tcg_ops restore_state_to_opcRichard Henderson
2022-10-04hw/core: Add CPUClass.get_pcRichard Henderson
2022-09-13target/xtensa: Honour -semihosting-config userspace=onPeter Maydell
2022-09-13semihosting: Allow optional use of semihosting from userspacePeter Maydell
2022-09-06accel/tcg: Add pc and host_pc params to gen_intermediate_codeRichard Henderson
2022-05-11Clean up decorations and whitespace around header guardsMarkus Armbruster
2022-05-11Normalize header guard symbol definitionMarkus Armbruster
2022-05-11Clean up header guards that don't match their file nameMarkus Armbruster
2022-05-06target/xtensa: implement cache test option opcodesMax Filippov
2022-05-06target/xtensa: add clock input to xtensa CPUMax Filippov
2022-05-06target/xtensa: import core lx106Simon Safar
2022-05-06target/xtensa: use tcg_constant_* for remaining opcodesMax Filippov
2022-05-06target/xtensa: use tcg_constant_* for FPU conversion opcodesMax Filippov
2022-05-06target/xtensa: use tcg_constant_* for numbered special registersMax Filippov
2022-05-06target/xtensa: use tcg_constant_* for TLB opcodesMax Filippov
2022-05-06target/xtensa: use tcg_constant_* for exceptionsMax Filippov
2022-05-06target/xtensa: use tcg_contatnt_* for numeric literalsMax Filippov
2022-05-06target/xtensa: fix missing tcg_temp_free in gen_window_checkMax Filippov
2022-04-21compiler.h: replace QEMU_NORETURN with G_NORETURNMarc-André Lureau
2022-04-20exec/translator: Pass the locked filepointer to disas_log hookRichard Henderson
2022-04-06Remove qemu-common.h include from most unitsMarc-André Lureau
2022-04-06Move CPU softfloat unions to cpu-float.hMarc-André Lureau
2022-04-06Replace TARGET_WORDS_BIGENDIANMarc-André Lureau
2022-04-06Replace config-time define HOST_WORDS_BIGENDIANMarc-André Lureau
2022-03-06target: Use ArchCPU as interface to target CPUPhilippe Mathieu-Daudé
2022-03-06target: Introduce and use OBJECT_DECLARE_CPU_TYPE() macroPhilippe Mathieu-Daudé
2022-03-06target: Use CPUArchState as interface to target-specific CPU statePhilippe Mathieu-Daudé
2022-03-06target: Use forward declared type instead of structure typePhilippe Mathieu-Daudé