slackcoder/qemu - QEMU is a generic and open source machine & userspace emulator and virtualizer

Age	Commit message (Expand)	Author
2020-03-17	gdbstub: extend GByteArray to read register helpers	Alex Bennée
2020-01-15	target/xtensa: Remove MMU_MODE{0,1,2,3}_SUFFIX	Richard Henderson
2020-01-06	target/xtensa: fix ps.ring use in MPU configs	Max Filippov
2019-09-11	target/xtensa: linux-user: add call0 ABI support	Max Filippov
2019-08-20	configure: Define target access alignment in configure	tony.nguyen@bt.com
2019-06-12	Include qemu-common.h exactly where needed	Markus Armbruster
2019-06-10	cpu: Remove CPU_COMMON	Richard Henderson
2019-06-10	cpu: Introduce CPUNegativeOffsetState	Richard Henderson
2019-06-10	cpu: Move ENV_OFFSET to exec/gen-icount.h	Richard Henderson
2019-06-10	target/xtensa: Use env_cpu, env_archcpu	Richard Henderson
2019-06-10	cpu: Replace ENV_GET_CPU with env_cpu	Richard Henderson
2019-06-10	cpu: Define ArchCPU	Richard Henderson
2019-06-10	cpu: Define CPUArchState with typedef	Richard Henderson
2019-06-10	tcg: Split out target/arch/cpu-param.h	Richard Henderson
2019-05-21	Merge remote-tracking branch 'remotes/xtensa/tags/20190520-xtensa' into staging	Peter Maydell
2019-05-15	target/xtensa: implement exclusive access option	Max Filippov
2019-05-15	target/xtensa: update list of exception causes	Max Filippov
2019-05-14	target/xtensa: implement DIWBUI.P opcode	Max Filippov
2019-05-10	target/xtensa: implement MPU option	Max Filippov
2019-05-10	target/xtensa: add parity/ECC option SRs	Max Filippov
2019-05-10	target/xtensa: define IDMA and gather/scatter IRQ types	Max Filippov
2019-05-10	target/xtensa: make internal MMU functions static	Max Filippov
2019-05-10	target/xtensa: get rid of centralized SR properties	Max Filippov
2019-05-10	target/xtensa: Convert to CPUClass::tlb_fill	Richard Henderson
2019-04-18	qom/cpu: Simplify how CPUClass:cpu_dump_state() prints	Markus Armbruster
2019-04-18	target: Clean up how the dump_mmu() print	Markus Armbruster
2019-04-18	target: Simplify how the TARGET_cpu_list() print	Markus Armbruster
2019-02-28	target/xtensa: implement PREFCTL SR	Max Filippov
2019-02-28	target/xtensa: prioritize load/store in FLIX bundles	Max Filippov
2019-02-28	target/xtensa: reorganize register handling in translators	Max Filippov
2019-02-28	target/xtensa: move WINDOW_BASE SR update to postprocessing	Max Filippov
2019-02-28	target/xtensa: add generic instruction post-processing	Max Filippov
2019-02-28	target/xtensa: sort FLIX instruction opcodes	Max Filippov
2019-02-18	target/xtensa: allow multiple names for single opcode	Max Filippov
2019-02-18	target/xtensa: don't require opcode table sorting	Max Filippov
2019-02-18	target/xtensa: move xtensa_finalize_config to xtensa_core_class_init	Max Filippov
2019-02-10	target/xtensa: don't specify windowed registers manually	Max Filippov
2019-01-28	target/xtensa: expose core runstall as an IRQ line	Max Filippov
2019-01-28	target/xtensa: rearrange access to external interrupts	Max Filippov
2019-01-28	target/xtensa: drop function xtensa_timer_irq	Max Filippov
2019-01-11	target/xtensa: rework zero overhead loops implementation	Max Filippov
2018-10-01	target/xtensa: extract test for cpdisabled exception	Max Filippov
2018-10-01	target/xtensa: extract test for window overflow exception	Max Filippov
2018-10-01	target/xtensa: extract test for an illegal instruction	Max Filippov
2018-09-17	target/xtensa: convert to do_transaction_failed	Max Filippov
2018-08-19	target/xtensa: clean up gdbstub register handling	Max Filippov
2018-06-30	target/xtensa: check zero overhead loop alignment	Max Filippov
2018-03-19	cpu: get rid of unused cpu_init() defines	Igor Mammedov
2018-03-19	cpu: add CPU_RESOLVING_TYPE macro	Igor Mammedov
2018-03-16	target/xtensa: add linux-user support	Max Filippov