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QEMU is a generic and open source machine & userspace emulator and virtualizer
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riscv
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2024-04-09
target/riscv: Use insn_start from DisasContextBase
Richard Henderson
2024-03-22
target/riscv/kvm: fix timebase-frequency when using KVM acceleration
Yong-Xuan Wang
2024-03-22
target/riscv: Fix mode in riscv_tlb_fill
Irina Ryapolova
2024-03-22
target/riscv: rvv: Remove the dependency of Zvfbfmin to Zfbfmin
Max Chou
2024-03-22
target/riscv/vector_helper.c: optimize loops in ldst helpers
Daniel Henrique Barboza
2024-03-22
target/riscv: enable 'vstart_eq_zero' in the end of insns
Ivan Klokov
2024-03-22
trans_rvv.c.inc: remove redundant mark_vs_dirty() calls
Daniel Henrique Barboza
2024-03-22
target/riscv: remove 'over' brconds from vector trans
Daniel Henrique Barboza
2024-03-22
target/riscv/vector_helpers: do early exit when vstart >= vl
Daniel Henrique Barboza
2024-03-22
target/riscv: always clear vstart for ldst_whole insns
Daniel Henrique Barboza
2024-03-22
target/riscv: always clear vstart in whole vec move insns
Daniel Henrique Barboza
2024-03-22
target/riscv/vector_helper.c: fix 'vmvr_v' memcpy endianess
Daniel Henrique Barboza
2024-03-22
trans_rvv.c.inc: set vstart = 0 in int scalar move insns
Daniel Henrique Barboza
2024-03-22
target/riscv/vector_helper.c: set vstart = 0 in GEN_VEXT_VSLIDEUP_VX()
Daniel Henrique Barboza
2024-03-22
target/riscv: do not enable all named features by default
Daniel Henrique Barboza
2024-03-12
Merge tag 'pull-error-2024-03-12' of https://repo.or.cz/qemu/armbru into staging
Peter Maydell
2024-03-12
Merge tag 'pull-request-2024-03-12' of https://gitlab.com/thuth/qemu into sta...
Peter Maydell
2024-03-12
target: Improve error reporting for CpuModelInfo member @props
Markus Armbruster
2024-03-12
target: Simplify type checks for CpuModelInfo member @props
Markus Armbruster
2024-03-12
target: Replace CPU_GET_CLASS(cpu -> obj) in cpu_reset_hold() handler
Philippe Mathieu-Daudé
2024-03-11
migration: export migration_is_running
Steve Sistare
2024-03-08
target/riscv: Fix privilege mode of G-stage translation for debugging
Hiroaki Yamamoto
2024-03-08
target/riscv: Fix shift count overflow
demin.han
2024-03-08
trans_rvv.c.inc: remove 'is_store' bool from load/store fns
Daniel Henrique Barboza
2024-03-08
trans_rvv.c.inc: mark_vs_dirty() before loads and stores
Daniel Henrique Barboza
2024-03-08
target/riscv: mcountinhibit, mcounteren, scounteren, hcounteren is 32-bit
Vadim Shakirov
2024-03-08
target/riscv: move ratified/frozen exts to non-experimental
Daniel Henrique Barboza
2024-03-08
target/riscv/kvm: update KVM exts to Linux 6.8
Daniel Henrique Barboza
2024-03-08
RISC-V: Add support for Ztso
Palmer Dabbelt
2024-03-08
target/riscv: Add missing include guard in pmu.h
Frank Chang
2024-03-08
target/riscv: UPDATE xATP write CSR
Irina Ryapolova
2024-03-08
target/riscv: FIX xATP_MODE validation
Irina Ryapolova
2024-03-08
target/riscv: Promote svade to a normal extension
Andrew Jones
2024-03-08
target/riscv: Gate hardware A/D PTE bit updating
Andrew Jones
2024-03-08
target/riscv: Reset henvcfg to zero
Andrew Jones
2024-03-08
target/riscv: add remaining named features
Daniel Henrique Barboza
2024-03-08
target/riscv: add riscv,isa to named features
Daniel Henrique Barboza
2024-03-08
target/riscv/tcg: set 'mmu' with 'satp' in cpu_set_profile()
Daniel Henrique Barboza
2024-03-08
target/riscv: Update $ra with current $pc in trans_cm_jalt()
Jason Chien
2024-02-28
gdbstub: Add members to identify registers to GDBFeature
Akihiko Odaki
2024-02-28
hw/core/cpu: Remove gdb_get_dynamic_xml member
Akihiko Odaki
2024-02-28
gdbstub: Infer number of core registers from XML
Akihiko Odaki
2024-02-28
gdbstub: Change gdb_get_reg_cb and gdb_set_reg_cb
Akihiko Odaki
2024-02-28
gdbstub: Use GDBFeature for gdb_register_coprocessor
Akihiko Odaki
2024-02-28
target/riscv: Use GDBFeature for dynamic XML
Akihiko Odaki
2024-02-12
Merge tag 'pull-maintainer-updates-090224-1' of https://gitlab.com/stsquad/qe...
Peter Maydell
2024-02-09
kconfig: use "select" to enable semihosting
Paolo Bonzini
2024-02-09
target/riscv: add rv32i, rv32e and rv64e CPUs
Daniel Henrique Barboza
2024-02-09
target/riscv/cpu.c: add riscv_bare_cpu_init()
Daniel Henrique Barboza
2024-02-09
target/riscv: Enable xtheadsync under user mode
LIU Zhiwei
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