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path: root/target/riscv/cpu.c
AgeCommit message (Expand)Author
2024-07-18target/riscv: Expose the Smcntrpmf configAtish Patra
2024-07-18target/riscv: Add cycle & instret privilege mode filtering propertiesKaiwen Xue
2024-07-18target/riscv: Expose zabha extension as a cpu propertyLIU Zhiwei
2024-07-18target/riscv: Support Zama16b extensionLIU Zhiwei
2024-07-18target/riscv: Add zcmop extensionLIU Zhiwei
2024-07-18target/riscv: Add zimop extensionLIU Zhiwei
2024-07-11target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementationPeter Maydell
2024-06-26target/riscv: Add multi extension implied rulesFrank Chang
2024-06-26target/riscv: Add MISA extension implied rulesFrank Chang
2024-06-26target/riscv: Introduce extension implied rules definitionFrank Chang
2024-06-26target/riscv: Support the version for ss1p13Fea.Wang
2024-06-26target/riscv: Reuse the conversion function of priv_specJim Shu
2024-06-04Merge tag 'hw-misc-accel-20240604' of https://github.com/philmd/qemu into sta...Richard Henderson
2024-06-04target/riscv: Restrict 'rv128' machine to TCG acceleratorPhilippe Mathieu-Daudé
2024-06-03target/riscv: Remove experimental prefix from "B" extensionRob Bradford
2024-06-03riscv: thead: Add th.sxstatus CSR emulationChristoph Müllner
2024-06-03target/riscv: Implement dynamic establishment of custom decoderHuang Tao
2024-06-03target/riscv/cpu.c: fix Zvkb extension configYangyu Chen
2024-06-03target/riscv: Add support for Zve64x extensionJason Chien
2024-06-03target/riscv: Add support for Zve32x extensionJason Chien
2024-04-25hw, target: Add ResetType argument to hold and exit phase methodsPeter Maydell
2024-03-22target/riscv: do not enable all named features by defaultDaniel Henrique Barboza
2024-03-12target: Replace CPU_GET_CLASS(cpu -> obj) in cpu_reset_hold() handlerPhilippe Mathieu-Daudé
2024-03-08target/riscv: move ratified/frozen exts to non-experimentalDaniel Henrique Barboza
2024-03-08RISC-V: Add support for ZtsoPalmer Dabbelt
2024-03-08target/riscv: Promote svade to a normal extensionAndrew Jones
2024-03-08target/riscv: Gate hardware A/D PTE bit updatingAndrew Jones
2024-03-08target/riscv: Reset henvcfg to zeroAndrew Jones
2024-03-08target/riscv: add remaining named featuresDaniel Henrique Barboza
2024-03-08target/riscv: add riscv,isa to named featuresDaniel Henrique Barboza
2024-02-28hw/core/cpu: Remove gdb_get_dynamic_xml memberAkihiko Odaki
2024-02-28gdbstub: Infer number of core registers from XMLAkihiko Odaki
2024-02-28target/riscv: Use GDBFeature for dynamic XMLAkihiko Odaki
2024-02-09target/riscv: add rv32i, rv32e and rv64e CPUsDaniel Henrique Barboza
2024-02-09target/riscv/cpu.c: add riscv_bare_cpu_init()Daniel Henrique Barboza
2024-02-09target/riscv: support new isa extension detection devicetree propertiesConor Dooley
2024-02-09target/riscv: use misa_mxl_max to populate isa string rather than TARGET_LONG...Conor Dooley
2024-02-09target/riscv: Expose Zaamo and Zalrsc extensionsRob Bradford
2024-02-09target/riscv: Validate misa_mxl_max only onceAkihiko Odaki
2024-02-09target/riscv: Move misa_mxl_max to classAkihiko Odaki
2024-02-09target/riscv/cpu.c: remove cpu->cfg.vlenDaniel Henrique Barboza
2024-02-09target/riscv: add 'vlenb' field in cpu->cfgDaniel Henrique Barboza
2024-02-09target/riscv/cpu.c: move 'marchid' to riscv_cpu_properties[]Daniel Henrique Barboza
2024-02-09target/riscv/cpu.c: move 'mimpid' to riscv_cpu_properties[]Daniel Henrique Barboza
2024-02-09target/riscv/cpu.c: move 'mvendorid' to riscv_cpu_properties[]Daniel Henrique Barboza
2024-02-09target/riscv: remove riscv_cpu_options[]Daniel Henrique Barboza
2024-02-09target/riscv: move 'cboz_blocksize' to riscv_cpu_properties[]Daniel Henrique Barboza
2024-02-09target/riscv: move 'cbop_blocksize' to riscv_cpu_properties[]Daniel Henrique Barboza
2024-02-09target/riscv: move 'cbom_blocksize' to riscv_cpu_properties[]Daniel Henrique Barboza
2024-02-09target/riscv: create finalize_features() for KVMDaniel Henrique Barboza