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path: root/target/openrisc/cpu.h
AgeCommit message (Expand)Author
2024-02-03include/exec: Implement cpu_mmu_index genericallyRichard Henderson
2024-02-03target/openrisc: Populate CPUClass.mmu_indexRichard Henderson
2024-01-05target/openrisc: Use generic cpu_list()Gavin Shan
2023-11-07target/openrisc: Declare QOM definitions in 'cpu-qom.h'Philippe Mathieu-Daudé
2023-11-07target: Unify QOM stylePhilippe Mathieu-Daudé
2023-10-03accel/tcg: Move CPUNegativeOffsetState into CPUStateRichard Henderson
2023-07-25other architectures: spelling fixesMichael Tokarev
2023-06-26target: Widen pc/cs_base in cpu_get_tb_cpu_stateAnton Johansson
2023-02-27target/cpu: Restrict cpu_get_phys_page_debug() handlers to sysemuPhilippe Mathieu-Daudé
2022-12-16target/openrisc: Convert to 3-phase resetPeter Maydell
2022-09-04target/openrisc: Enable MTTCGStafford Horne
2022-04-06Move CPU softfloat unions to cpu-float.hMarc-André Lureau
2022-03-06target: Use ArchCPU as interface to target CPUPhilippe Mathieu-Daudé
2022-03-06target: Introduce and use OBJECT_DECLARE_CPU_TYPE() macroPhilippe Mathieu-Daudé
2022-03-06target: Use CPUArchState as interface to target-specific CPU statePhilippe Mathieu-Daudé
2022-03-06target: Use forward declared type instead of structure typePhilippe Mathieu-Daudé
2021-11-02target/openrisc: Make openrisc_cpu_tlb_fill sysemu onlyRichard Henderson
2021-09-21include/exec: Move cpu_signal_handler declarationRichard Henderson
2021-09-14target/openrisc: Restrict cpu_exec_interrupt() handler to sysemuPhilippe Mathieu-Daudé
2020-12-15target/openrisc: Move pic_cpu code into CPU object properPeter Maydell
2020-09-18qom: Remove module_obj_name parameter from OBJECT_DECLARE* macrosEduardo Habkost
2020-09-09Use OBJECT_DECLARE_TYPE where possibleEduardo Habkost
2020-09-09Use DECLARE_*CHECKER* macrosEduardo Habkost
2020-09-09Move QOM typedefs and add missing includesEduardo Habkost
2020-03-19Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-requ...Peter Maydell
2020-03-17cpu: Use DeviceClass reset instead of a special CPUClass resetPeter Maydell
2020-03-17gdbstub: extend GByteArray to read register helpersAlex Bennée
2019-09-04target/openrisc: Implement move to/from FPCSRRichard Henderson
2019-09-04target/openrisc: Add VR2 and AVR special processor registersRichard Henderson
2019-09-04target/openrisc: Move VR, UPR, DMMCFGR, IMMCFGR to cpu initRichard Henderson
2019-09-04target/openrisc: Make VR and PPC read-onlyRichard Henderson
2019-08-21hw/core: Move cpu.c, cpu.h from qom/ to hw/core/Markus Armbruster
2019-08-16migration: Move the VMStateDescription typedef to typedefs.hMarkus Armbruster
2019-06-12Include qemu-common.h exactly where neededMarkus Armbruster
2019-06-10cpu: Remove CPU_COMMONRichard Henderson
2019-06-10cpu: Introduce CPUNegativeOffsetStateRichard Henderson
2019-06-10cpu: Move ENV_OFFSET to exec/gen-icount.hRichard Henderson
2019-06-10target/openrisc: Use env_cpu, env_archcpuRichard Henderson
2019-06-10cpu: Replace ENV_GET_CPU with env_cpuRichard Henderson
2019-06-10cpu: Define ArchCPURichard Henderson
2019-06-10cpu: Define CPUArchState with typedefRichard Henderson
2019-06-10tcg: Split out target/arch/cpu-param.hRichard Henderson
2019-05-10target/openrisc: Convert to CPUClass::tlb_fillRichard Henderson
2019-05-08target/openrisc: Fix LGPL information in the file headersThomas Huth
2019-04-18qom/cpu: Simplify how CPUClass:cpu_dump_state() printsMarkus Armbruster
2019-04-18target: Simplify how the TARGET_cpu_list() printMarkus Armbruster
2018-07-03target/openrisc: Reorg tlb lookupRichard Henderson
2018-07-03target/openrisc: Increase the TLB sizeRichard Henderson
2018-07-03target/openrisc: Use identical sizes for ITLB and DTLBRichard Henderson
2018-07-03target/openrisc: Fix cpu_mmu_indexRichard Henderson