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path: root/target/mips/translate.c
AgeCommit message (Expand)Author
2021-04-13target/mips: Fix TCG temporary leak in gen_cache_operation()Philippe Mathieu-Daudé
2021-03-13target/mips/tx79: Salvage instructions description commentPhilippe Mathieu-Daudé
2021-03-13target/mips: Remove 'C790 Multimedia Instructions' dead codePhilippe Mathieu-Daudé
2021-03-13target/mips/tx79: Move PCPYLD / PCPYUD opcodes to decodetreePhilippe Mathieu-Daudé
2021-03-13target/mips/tx79: Move PCPYH opcode to decodetreePhilippe Mathieu-Daudé
2021-03-13target/mips/translate: Simplify PCPYH using deposit_i64()Philippe Mathieu-Daudé
2021-03-13target/mips/translate: Make gen_rdhwr() publicPhilippe Mathieu-Daudé
2021-03-13target/mips/tx79: Move MTHI1 / MTLO1 opcodes to decodetreePhilippe Mathieu-Daudé
2021-03-13target/mips/tx79: Move MFHI1 / MFLO1 opcodes to decodetreePhilippe Mathieu-Daudé
2021-03-13target/mips: Use gen_load_gpr[_hi]() when possiblePhilippe Mathieu-Daudé
2021-03-13target/mips: Extract MXU code to new mxu_translate.c filePhilippe Mathieu-Daudé
2021-03-13target/mips: Introduce mxu_translate_init() helperPhilippe Mathieu-Daudé
2021-03-13target/mips: Simplify decode_opc_mxu() ifdef'ryPhilippe Mathieu-Daudé
2021-03-13target/mips: Convert decode_ase_mxu() to decodetree prototypePhilippe Mathieu-Daudé
2021-03-13target/mips: Rename decode_opc_mxu() as decode_ase_mxu()Philippe Mathieu-Daudé
2021-03-13target/mips: Move MUL opcode check from decode_mxu() to decode_legacy()Philippe Mathieu-Daudé
2021-03-13target/mips: Use OPC_MUL instead of OPC__MXU_MULPhilippe Mathieu-Daudé
2021-03-13target/mips: Pass instruction opcode to decode_opc_mxu()Philippe Mathieu-Daudé
2021-03-13target/mips: Remove unused CPUMIPSState* from MXU functionsPhilippe Mathieu-Daudé
2021-03-13target/mips: Remove XBurst Media eXtension Unit dead codePhilippe Mathieu-Daudé
2021-03-13target/mips: Rewrite complex ifdef'ryPhilippe Mathieu-Daudé
2021-03-10semihosting: Move include/hw/semihosting/ -> include/semihosting/Philippe Mathieu-Daudé
2021-02-21target/mips: Use GPR move functions in gen_HILO1_tx79()Philippe Mathieu-Daudé
2021-02-21target/mips: Introduce gen_load_gpr_hi() / gen_store_gpr_hi() helpersPhilippe Mathieu-Daudé
2021-02-21target/mips: Rename 128-bit upper halve GPR registersPhilippe Mathieu-Daudé
2021-02-21target/mips: Promote 128-bit multimedia registers as global onesPhilippe Mathieu-Daudé
2021-02-21target/mips: Make cpu_HI/LO registers publicPhilippe Mathieu-Daudé
2021-02-21target/mips: fetch code with translator_ldPhilippe Mathieu-Daudé
2021-01-14target/mips: Convert Rel6 LL/SC opcodes to decodetreePhilippe Mathieu-Daudé
2021-01-14target/mips: Convert Rel6 LLD/SCD opcodes to decodetreePhilippe Mathieu-Daudé
2021-01-14target/mips: Convert Rel6 LDL/LDR/SDL/SDR opcodes to decodetreePhilippe Mathieu-Daudé
2021-01-14target/mips: Convert Rel6 LWLE/LWRE/SWLE/SWRE opcodes to decodetreePhilippe Mathieu-Daudé
2021-01-14target/mips: Convert Rel6 LWL/LWR/SWL/SWR opcodes to decodetreePhilippe Mathieu-Daudé
2021-01-14target/mips: Convert Rel6 CACHE/PREF opcodes to decodetreePhilippe Mathieu-Daudé
2021-01-14target/mips: Convert Rel6 COP1X opcode to decodetreePhilippe Mathieu-Daudé
2021-01-14target/mips: Convert Rel6 Special2 opcode to decodetreePhilippe Mathieu-Daudé
2021-01-14target/mips: Remove now unreachable LSA/DLSA opcodes codePhilippe Mathieu-Daudé
2021-01-14target/mips: Introduce decodetree helpers for Release6 LSA/DLSA opcodesPhilippe Mathieu-Daudé
2021-01-14target/mips: Extract LSA/DLSA translation generatorsPhilippe Mathieu-Daudé
2021-01-14target/mips: Use decode_ase_msa() generated from decodetreePhilippe Mathieu-Daudé
2021-01-14target/mips: Extract MSA translation routinesPhilippe Mathieu-Daudé
2021-01-14target/mips: Declare gen_msa/_branch() in 'translate.h'Philippe Mathieu-Daudé
2021-01-14target/mips: Explode gen_msa_branch() as gen_msa_BxZ_V/BxZ()Philippe Mathieu-Daudé
2021-01-14target/mips: Remove CPUMIPSState* argument from gen_msa*() methodsPhilippe Mathieu-Daudé
2021-01-14target/mips: Extract msa_translate_init() from mips_tcg_init()Philippe Mathieu-Daudé
2021-01-14target/mips: Alias MSA vector registers on FPU scalar registersPhilippe Mathieu-Daudé
2021-01-14target/mips: Simplify MSA TCG logicPhilippe Mathieu-Daudé
2021-01-14target/mips: Introduce ase_msa_available() helperPhilippe Mathieu-Daudé
2021-01-14target/mips/translate: Expose check_mips_64() to 32-bit modePhilippe Mathieu-Daudé
2021-01-14target/mips/translate: Extract decode_opc_legacy() from decode_opc()Philippe Mathieu-Daudé