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AgeCommit message (Expand)Author
2024-04-09target/i386: Preserve DisasContextBase.insn_start across rewindRichard Henderson
2024-03-26target/i386/tcg: Enable page walking from MMIO memoryGregory Price
2024-02-28target/i386: leave the A20 bit set in the final NPT walkPaolo Bonzini
2024-02-28target/i386: remove unnecessary/wrong application of the A20 maskPaolo Bonzini
2024-02-28target/i386: Fix physical address truncationPaolo Bonzini
2024-02-28target/i386: use separate MMU indexes for 32-bit accessesPaolo Bonzini
2024-02-28target/i386: introduce function to query MMU indicesPaolo Bonzini
2024-02-28target/i386: check validity of VMCB addressesPaolo Bonzini
2024-02-28target/i386: mask high bits of CR3 in 32-bit modePaolo Bonzini
2024-02-16target/i386: Generate an illegal opcode exception on cmp instructions with lo...Ziqiao Kong
2024-02-14apic, i386/tcg: add x2apic transitionsBui Quang Minh
2024-02-14i386/tcg: implement x2APIC registers MSR accessBui Quang Minh
2024-02-03include/exec: Change cpu_mmu_index argument to CPUStateRichard Henderson
2024-01-29target/i386: Extract x86_cpu_exec_halt() from accel/tcg/Philippe Mathieu-Daudé
2024-01-29target/i386: Extract x86_need_replay_interrupt() from accel/tcg/Philippe Mathieu-Daudé
2024-01-29include/qemu: Add TCGCPUOps typedef to typedefs.hRichard Henderson
2024-01-29target: Use vaddr in gen_intermediate_codeAnton Johansson
2024-01-19Merge tag 'hw-cpus-20240119' of https://github.com/philmd/qemu into stagingPeter Maydell
2024-01-19target/i386: Rename tcg_cpu_FOO() to include 'x86'Philippe Mathieu-Daudé
2024-01-18target/i386: pcrel: store low bits of physical address in data[0]Paolo Bonzini
2024-01-18target/i386: fix incorrect EIP in PC-relative translation blocksguoguangyao
2024-01-18target/i386: Do not re-compute new pc with CF_PCRELRichard Henderson
2024-01-08system/cpus: rename qemu_mutex_lock_iothread() to bql_lock()Stefan Hajnoczi
2023-12-29target/i386: implement CMPccXADDPaolo Bonzini
2023-12-29target/i386: introduce flags writeback mechanismPaolo Bonzini
2023-12-29target/i386: adjust decoding of J operandPaolo Bonzini
2023-12-29target/i386: move operand load and writeback out of gen_cmovcc1Paolo Bonzini
2023-12-29target/i386: prepare for implementation of STOS/SCAS in new decoderPaolo Bonzini
2023-12-29target/i386: do not use s->tmp0 for jumps on ECX ==/!= 0Paolo Bonzini
2023-12-29target/i386: do not use s->tmp4 for pushPaolo Bonzini
2023-12-29target/i386: split eflags computation out of gen_compute_eflagsPaolo Bonzini
2023-12-29target/i386: do not clobber T0 on string operationsPaolo Bonzini
2023-12-29target/i386: do not clobber A0 in POP translationPaolo Bonzini
2023-12-29target/i386: do not decode string source/destination into decode->memPaolo Bonzini
2023-12-29target/i386: add X86_SPECIALs for MOVSX and MOVZXPaolo Bonzini
2023-12-29target/i386: rename zext0/zext2 and make them closer to the manualPaolo Bonzini
2023-12-29target/i386: avoid trunc and ext for MULX and RORXPaolo Bonzini
2023-12-29target/i386: reimplement check for validity of LOCK prefixPaolo Bonzini
2023-12-29target/i386: document more deviations from the manualPaolo Bonzini
2023-12-29target/i386: clean up cpu_cc_compute_allPaolo Bonzini
2023-12-29target/i386: remove unnecessary truncationsPaolo Bonzini
2023-12-29target/i386: remove unnecessary arguments from raise_interruptPaolo Bonzini
2023-12-29target/i386: speedup JO/SETO after MUL or IMULPaolo Bonzini
2023-12-29target/i386: optimize computation of JL and JLE from flagsPaolo Bonzini
2023-12-12target/i386: Fix 32-bit wrapping of pc/eip computationRichard Henderson
2023-10-25target/i386: validate VEX.W for AVX instructionsPaolo Bonzini
2023-10-25target/i386: group common checks in the decoding phasePaolo Bonzini
2023-10-25target/i386: implement SHA instructionsPaolo Bonzini
2023-10-22target/i386: Use tcg_gen_ext_tlRichard Henderson
2023-10-22target/i386: Use i128 for 128 and 256-bit loads and storesRichard Henderson
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