| Age | Commit message (Expand) | Author |
|---|
| 2023-11-17 | target/hppa: Fix 64-bit SHRPD instruction | Helge Deller |
| 2023-11-13 | target/hppa: Replace MMU_PHYS_IDX with MMU_ABS_IDX, MMU_ABS_W_IDX | Richard Henderson |
| 2023-11-13 | target/hppa: Introduce MMU_IDX_MMU_DISABLED | Richard Henderson |
| 2023-11-13 | target/hppa: Use only low 2 immediate bits for PROBEI | Richard Henderson |
| 2023-11-12 | target/hppa: Mask reserved PSW bits in expand_sm_imm | Helge Deller |
| 2023-11-06 | target/hppa: Add unwind_breg to CPUHPPAState | Richard Henderson |
| 2023-11-06 | target/hppa: Clear upper bits in mtctl for pa1.x | Helge Deller |
| 2023-11-06 | target/hppa: Add pa2.0 cpu local tlb flushes | Helge Deller |
| 2023-11-06 | target/hppa: Implement pa2.0 data prefetch instructions | Richard Henderson |
| 2023-11-06 | target/hppa: Return zero for r0 from load_gpr | Richard Henderson |
| 2023-11-06 | target/hppa: Precompute zero into DisasContext | Richard Henderson |
| 2023-11-06 | target/hppa: Implement PERMH | Richard Henderson |
| 2023-11-06 | target/hppa: Implement MIXH, MIXW | Richard Henderson |
| 2023-11-06 | target/hppa: Implement HSHLADD, HSHRADD | Richard Henderson |
| 2023-11-06 | target/hppa: Implement HSHL, HSHR | Richard Henderson |
| 2023-11-06 | target/hppa: Implement HAVG | Richard Henderson |
| 2023-11-06 | target/hppa: Implement HSUB | Richard Henderson |
| 2023-11-06 | target/hppa: Implement HADD | Richard Henderson |
| 2023-11-06 | target/hppa: Replace tcg_gen_*_tl with tcg_gen_*_i64 | Richard Henderson |
| 2023-11-06 | target/hppa: Use tcg_temp_new_i64 not tcg_temp_new | Richard Henderson |
| 2023-11-06 | target/hppa: Remove remaining TARGET_REGISTER_BITS redirections | Richard Henderson |
| 2023-11-06 | target/hppa: Remove most of the TARGET_REGISTER_BITS redirections | Richard Henderson |
| 2023-11-06 | target/hppa: Remove TARGET_REGISTER_BITS | Richard Henderson |
| 2023-11-06 | target/hppa: Implement IDTLBT, IITLBT | Richard Henderson |
| 2023-11-06 | target/hppa: Implement STDBY | Richard Henderson |
| 2023-11-06 | target/hppa: Implement CLRBTS, POPBTS, PUSHBTS, PUSHNOM | Richard Henderson |
| 2023-11-06 | target/hppa: Implement SHRPD | Richard Henderson |
| 2023-11-06 | target/hppa: Implement EXTRD | Richard Henderson |
| 2023-11-06 | target/hppa: Implement DEPD, DEPDI | Richard Henderson |
| 2023-11-06 | target/hppa: Implement LDD, LDCD, LDDA, STD, STDA | Richard Henderson |
| 2023-11-06 | target/hppa: Decode ADDB double-word | Richard Henderson |
| 2023-11-06 | target/hppa: Decode CMPIB double-word | Richard Henderson |
| 2023-11-06 | target/hppa: Decode d for cmpb instructions | Richard Henderson |
| 2023-11-06 | target/hppa: Decode d for bb instructions | Richard Henderson |
| 2023-11-06 | target/hppa: Decode d for sub instructions | Richard Henderson |
| 2023-11-06 | target/hppa: Decode d for add instructions | Richard Henderson |
| 2023-11-06 | target/hppa: Decode d for cmpclr instructions | Richard Henderson |
| 2023-11-06 | target/hppa: Decode d for unit instructions | Richard Henderson |
| 2023-11-06 | target/hppa: Decode d for logical instructions | Richard Henderson |
| 2023-11-06 | target/hppa: Remove TARGET_HPPA64 | Richard Henderson |
| 2023-11-06 | target/hppa: Pass d to do_unit_cond | Richard Henderson |
| 2023-11-06 | target/hppa: Pass d to do_sed_cond | Richard Henderson |
| 2023-11-06 | target/hppa: Pass d to do_log_cond | Richard Henderson |
| 2023-11-06 | target/hppa: Pass d to do_sub_cond | Richard Henderson |
| 2023-11-06 | target/hppa: Pass d to do_cond | Richard Henderson |
| 2023-11-06 | target/hppa: sar register allows only 5 bits on 32-bit CPU | Helge Deller |
| 2023-11-06 | target/hppa: Mask inputs in copy_iaoq_entry | Richard Henderson |
| 2023-11-06 | target/hppa: Use copy_iaoq_entry for link in do_ibranch | Richard Henderson |
| 2023-11-06 | target/hppa: Always use copy_iaoq_entry to set cpu_iaoq_[fb] | Richard Henderson |
| 2023-11-06 | target/hppa: Pass DisasContext to copy_iaoq_entry | Richard Henderson |
