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AgeCommit message (Expand)Author
2020-07-11target/avr/disas: Fix store instructions display orderPhilippe Mathieu-Daudé
2020-07-11target/avr/cpu: Fix $PC displayed addressPhilippe Mathieu-Daudé
2020-07-11target/avr/cpu: Drop tlb_flush() in avr_cpu_reset()Philippe Mathieu-Daudé
2020-07-11target/avr: Register AVR support with the rest of QEMUMichael Rolnik
2020-07-11target/avr: Add support for disassembling via option '-d in_asm'Michael Rolnik
2020-07-11target/avr: Initialize TCG register variablesMichael Rolnik
2020-07-11target/avr: Add instruction translation - CPU main translation functionMichael Rolnik
2020-07-11target/avr: Add instruction translation - MCU Control InstructionsMichael Rolnik
2020-07-11target/avr: Add instruction translation - Bit and Bit-test InstructionsMichael Rolnik
2020-07-11target/avr: Add instruction translation - Data Transfer InstructionsMichael Rolnik
2020-07-11target/avr: Add instruction translation - Branch InstructionsMichael Rolnik
2020-07-11target/avr: Add instruction translation - Arithmetic and Logic InstructionsMichael Rolnik
2020-07-11target/avr: Add instruction translation - Register definitionsMichael Rolnik
2020-07-11target/avr: Add instruction helpersMichael Rolnik
2020-07-10target/avr: Add definitions of AVR core typesMichael Rolnik
2020-07-10target/avr: Introduce enumeration AVRFeatureMichael Rolnik
2020-07-10target/avr: CPU class: Add GDB supportMichael Rolnik
2020-07-10target/avr: CPU class: Add migration supportMichael Rolnik
2020-07-10target/avr: CPU class: Add memory management supportMichael Rolnik
2020-07-10target/avr: CPU class: Add interrupt handling supportMichael Rolnik
2020-07-10target/avr: Introduce basic CPU class objectMichael Rolnik
2020-07-10target/avr: Add basic parameters of the new platformMichael Rolnik
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