| Age | Commit message (Expand) | Author |
|---|
| 2024-02-03 | target/arm: Populate CPUClass.mmu_index | Richard Henderson |
| 2024-02-03 | target/arm: Split out arm_env_mmu_index | Richard Henderson |
| 2024-01-29 | include/qemu: Add TCGCPUOps typedef to typedefs.h | Richard Henderson |
| 2024-01-29 | target: Use vaddr in gen_intermediate_code | Anton Johansson |
| 2024-01-26 | target/arm: Fix incorrect aa64_tidcp1 feature check | Peter Maydell |
| 2024-01-26 | target/arm: Fix A64 scalar SQSHRN and SQRSHRN | Peter Maydell |
| 2024-01-26 | target/arm: Move GTimer definitions to new 'gtimer.h' header | Philippe Mathieu-Daudé |
| 2024-01-26 | target/arm: Move e2h_access() helper around | Philippe Mathieu-Daudé |
| 2024-01-26 | target/arm: Move ARM_CPU_IRQ/FIQ definitions to 'cpu-qom.h' header | Philippe Mathieu-Daudé |
| 2024-01-26 | target/arm: Expose M-profile register bank index definitions | Philippe Mathieu-Daudé |
| 2024-01-26 | target/arm: Declare ARM_CPU_TYPE_NAME/SUFFIX in 'cpu-qom.h' | Philippe Mathieu-Daudé |
| 2024-01-26 | target/arm: Expose arm_cpu_mp_affinity() in 'multiprocessing.h' header | Philippe Mathieu-Daudé |
| 2024-01-26 | target/arm: Create arm_cpu_mp_affinity | Richard Henderson |
| 2024-01-26 | target/arm: Rename arm_cpu_mp_affinity | Richard Henderson |
| 2024-01-26 | target/arm/cpregs: Include missing 'kvm-consts.h' header | Philippe Mathieu-Daudé |
| 2024-01-26 | target/arm/cpregs: Include missing 'hw/registerfields.h' header | Philippe Mathieu-Daudé |
| 2024-01-26 | target/arm/cpu-features: Include missing 'hw/registerfields.h' header | Philippe Mathieu-Daudé |
| 2024-01-26 | target/arm: Fix VNCR fault detection logic | Peter Maydell |
| 2024-01-19 | target/arm: Ensure icount is enabled when emulating INST_RETIRED | Philippe Mathieu-Daudé |
| 2024-01-19 | system/cpu-timers: Introduce ICountMode enumerator | Philippe Mathieu-Daudé |
| 2024-01-19 | accel: Do not set CPUState::tcg_cflags in non-TCG accels | Philippe Mathieu-Daudé |
| 2024-01-15 | target/arm: arm_pamax() no longer needs to do feature propagation | Peter Maydell |
| 2024-01-09 | target/arm: Add FEAT_NV2 to max, neoverse-n2, neoverse-v1 CPUs | Peter Maydell |
| 2024-01-09 | target/arm: Enhance CPU_LOG_INT to show SPSR on AArch64 exception-entry | Peter Maydell |
| 2024-01-09 | target/arm: Report HCR_EL2.{NV,NV1,NV2} in cpu dumps | Peter Maydell |
| 2024-01-09 | target/arm: Mark up VNCR offsets (offsets >= 0x200, except GIC) | Peter Maydell |
| 2024-01-09 | target/arm: Mark up VNCR offsets (offsets 0x168..0x1f8) | Peter Maydell |
| 2024-01-09 | target/arm: Mark up VNCR offsets (offsets 0x100..0x160) | Peter Maydell |
| 2024-01-09 | target/arm: Mark up VNCR offsets (offsets 0x0..0xff) | Peter Maydell |
| 2024-01-09 | target/arm: Report VNCR_EL2 based faults correctly | Peter Maydell |
| 2024-01-09 | target/arm: Implement FEAT_NV2 redirection of sysregs to RAM | Peter Maydell |
| 2024-01-09 | target/arm: Handle FEAT_NV2 redirection of SPSR_EL2, ELR_EL2, ESR_EL2, FAR_EL2 | Peter Maydell |
| 2024-01-09 | target/arm: Handle FEAT_NV2 changes to when SPSR_EL1.M reports EL2 | Peter Maydell |
| 2024-01-09 | target/arm: Implement VNCR_EL2 register | Peter Maydell |
| 2024-01-09 | target/arm: Handle HCR_EL2 accesses for FEAT_NV2 bits | Peter Maydell |
| 2024-01-09 | target/arm: Add FEAT_NV to max, neoverse-n2, neoverse-v1 CPUs | Peter Maydell |
| 2024-01-09 | target/arm: Handle FEAT_NV page table attribute changes | Peter Maydell |
| 2024-01-09 | target/arm: Treat LDTR* and STTR* as LDR/STR when NV, NV1 is 1, 1 | Peter Maydell |
| 2024-01-09 | target/arm: Don't honour PSTATE.PAN when HCR_EL2.{NV, NV1} == {1, 1} | Peter Maydell |
| 2024-01-09 | target/arm: Always use arm_pan_enabled() when checking if PAN is enabled | Peter Maydell |
| 2024-01-09 | target/arm: Trap registers when HCR_EL2.{NV, NV1} == {1, 1} | Peter Maydell |
| 2024-01-09 | target/arm: Set SPSR_EL1.M correctly when nested virt is enabled | Peter Maydell |
| 2024-01-09 | target/arm: Make NV reads of CurrentEL return EL2 | Peter Maydell |
| 2024-01-09 | target/arm: Trap sysreg accesses for FEAT_NV | Peter Maydell |
| 2024-01-09 | target/arm: Move FPU/SVE/SME access checks up above ARM_CP_SPECIAL_MASK check | Peter Maydell |
| 2024-01-09 | target/arm: Make EL2 cpreg accessfns safe for FEAT_NV EL1 accesses | Peter Maydell |
| 2024-01-09 | target/arm: *_EL12 registers should UNDEF when HCR_EL2.E2H is 0 | Peter Maydell |
| 2024-01-09 | target/arm: Record correct opcode fields in cpreg for E2H aliases | Peter Maydell |
| 2024-01-09 | target/arm: Allow use of upper 32 bits of TBFLAG_A64 | Peter Maydell |
| 2024-01-09 | target/arm: Always honour HCR_EL2.TSC when HCR_EL2.NV is set | Peter Maydell |
