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QEMU is a generic and open source machine & userspace emulator and virtualizer
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2021-07-27
target/arm: Add sve-default-vector-length cpu property
Richard Henderson
2021-07-27
target/arm: Export aarch64_sve_zcr_get_valid_len
Richard Henderson
2021-07-27
target/arm: Correctly bound length in sve_zcr_get_valid_len
Richard Henderson
2021-07-27
target/arm: Report M-profile alignment faults correctly to the guest
Peter Maydell
2021-07-27
target/arm: Add missing 'return's after calling v7m_exception_taken()
Peter Maydell
2021-07-27
target/arm: Enforce that M-profile SP low 2 bits are always zero
Peter Maydell
2021-07-21
accel/tcg: Remove TranslatorOps.breakpoint_check
Richard Henderson
2021-07-21
target/arm: Implement debug_check_breakpoint
Richard Henderson
2021-07-21
tcg: Rename helper_atomic_*_mmu and provide for user-only
Richard Henderson
2021-07-18
target/arm: Remove duplicate 'plus1' function from Neon and SVE decode
Peter Maydell
2021-07-18
target/arm: Fix offsets for TTBCR
Richard Henderson
2021-07-12
Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210710' into...
Peter Maydell
2021-07-11
Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into ...
Peter Maydell
2021-07-09
target/arm: Use translator_use_goto_tb for aarch32
Richard Henderson
2021-07-09
target/arm: Use translator_use_goto_tb for aarch64
Richard Henderson
2021-07-09
target/arm: Use DISAS_TOO_MANY for ISB and SB
Richard Henderson
2021-07-09
tcg: Avoid including 'trace-tcg.h' in target translate.c
Philippe Mathieu-Daudé
2021-07-09
meson: Introduce target-specific Kconfig
Philippe Mathieu-Daudé
2021-07-09
target/arm: Correct the encoding of MDCCSR_EL0 and DBGDSCRint
hnick@vmware.com
2021-07-02
target/arm: Implement MVE shifts by register
Peter Maydell
2021-07-02
target/arm: Implement MVE shifts by immediate
Peter Maydell
2021-07-02
target/arm: Implement MVE long shifts by register
Peter Maydell
2021-07-02
target/arm: Implement MVE long shifts by immediate
Peter Maydell
2021-07-02
target/arm: Implement MVE VADDLV
Peter Maydell
2021-07-02
target/arm: Implement MVE VSHLC
Peter Maydell
2021-07-02
target/arm: Implement MVE saturating narrowing shifts
Peter Maydell
2021-07-02
target/arm: Implement MVE VSHRN, VRSHRN
Peter Maydell
2021-07-02
target/arm: Implement MVE VSRI, VSLI
Peter Maydell
2021-07-02
target/arm: Implement MVE VSHLL
Peter Maydell
2021-07-02
target/arm: Implement MVE vector shift right by immediate insns
Peter Maydell
2021-07-02
target/arm: Implement MVE vector shift left by immediate insns
Peter Maydell
2021-07-02
target/arm: Implement MVE logical immediate insns
Peter Maydell
2021-07-02
target/arm: Use dup_const() instead of bitfield_replicate()
Peter Maydell
2021-07-02
target/arm: Use asimd_imm_const for A64 decode
Peter Maydell
2021-07-02
target/arm: Make asimd_imm_const() public
Peter Maydell
2021-07-02
target/arm: Fix bugs in MVE VRMLALDAVH, VRMLSLDAVH
Peter Maydell
2021-07-02
target/arm: Fix MVE widening/narrowing VLDR/VSTR offset calculation
Peter Maydell
2021-07-02
target/arm: Check NaN mode before silencing NaN
Joe Komlodi
2021-06-29
target/arm: Improve REVSH
Richard Henderson
2021-06-29
target/arm: Improve vector REV
Richard Henderson
2021-06-29
target/arm: Improve REV32
Richard Henderson
2021-06-29
tcg: Add flags argument to tcg_gen_bswap16_*, tcg_gen_bswap32_i64
Richard Henderson
2021-06-24
target/arm: Implement MTE3
Peter Collingbourne
2021-06-24
target/arm: Make VMOV scalar <-> gpreg beatwise for MVE
Peter Maydell
2021-06-24
target/arm: Implement MVE VADDV
Peter Maydell
2021-06-24
target/arm: Implement MVE VHCADD
Peter Maydell
2021-06-24
target/arm: Implement MVE VCADD
Peter Maydell
2021-06-24
target/arm: Implement MVE VADC, VSBC
Peter Maydell
2021-06-24
target/arm: Implement MVE VRHADD
Peter Maydell
2021-06-24
target/arm: Implement MVE VQDMULL (vector)
Peter Maydell
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