aboutsummaryrefslogtreecommitdiff
path: root/target/arm/translate.h
AgeCommit message (Expand)Author
2018-10-24target/arm: Use gvec for NEON_3R_VTST_VCEQ, NEON_3R_VCGT, NEON_3R_VCGERichard Henderson
2018-10-24target/arm: Use gvec for NEON_3R_VMLRichard Henderson
2018-10-24target/arm: Use gvec for VSRI, VSLIRichard Henderson
2018-10-24target/arm: Use gvec for VSRARichard Henderson
2018-10-24target/arm: Use gvec for NEON_3R_LOGIC insnsRichard Henderson
2018-10-24target/arm: Convert v8 extensions from feature bits to isar testsRichard Henderson
2018-10-08target/arm: Define new TBFLAG for v8M stack checkingPeter Maydell
2018-05-17target/arm: convert conversion helpers to fpst/ahp_flagAlex Bennée
2018-05-09target/arm: avoid integer overflow in next_page PC checkEmilio G. Cota
2018-04-10tcg: Introduce tcg_set_insn_start_paramRichard Henderson
2018-02-09target/arm: Add SVE state to TB->FLAGSRichard Henderson
2018-01-25target/arm: Mark disas_set_insn_syndrome inlineRichard Henderson
2017-12-29tcg: Dynamically allocate TCGOpsRichard Henderson
2017-10-24tcg: Initialize cpu_env genericallyRichard Henderson
2017-09-07Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20170907'...Peter Maydell
2017-09-07target/arm: Implement BXNS, and banked stack pointersPeter Maydell
2017-09-06target/arm: [tcg] Port to generic translation frameworkLluís Vilanova
2017-09-06target/arm: [tcg] Port to translate_insnLluís Vilanova
2017-09-06target/arm: [tcg] Port to DisasContextBaseLluís Vilanova
2017-09-06target: [tcg] Use a generic enum for DISAS_ valuesLluís Vilanova
2017-09-06target/arm: Use DISAS_NORETURNRichard Henderson
2017-07-19tcg: Pass generic CPUState to gen_intermediate_code()Lluís Vilanova
2017-07-17target/arm/translate.h: expand comment on DISAS_EXITAlex Bennée
2017-06-05target/arm: optimize indirect branchesEmilio G. Cota
2017-06-02arm: Add support for M profile CPUs having different MMU index semanticsPeter Maydell
2017-04-20arm: Implement M profile exception return properlyPeter Maydell
2017-04-20arm: Track M profile handler mode state in TB flagsPeter Maydell
2017-02-07target/arm: A32, T32: Create Instruction Syndromes for Data AbortsPeter Maydell
2016-12-20Move target-* CPU file into a target/ folderThomas Huth
generated by cgit v1.2.3 (git 2.26.2) at 2024-11-25 18:51:27 +0000