| Age | Commit message (Expand) | Author |
|---|---|---|
| 2023-09-10 | target/arm: Fix 64-bit SSRA | Richard Henderson |
| 2023-07-31 | target/arm: Avoid writing to constant TCGv in trans_CSEL() | Peter Maydell |
| 2023-05-10 | target/arm: Define and use new load_cpu_field_low32() | Peter Maydell |
| 2023-04-03 | target/arm: Fix generated code for cpreg reads when HSTR is active | Peter Maydell |
| 2023-03-13 | target/arm: Improve trans_BFCI | Richard Henderson |
| 2023-03-05 | target/arm: Drop tcg_temp_free from translator.c | Richard Henderson |
| 2023-03-05 | target/arm: Remove value_global from DisasCompare | Richard Henderson |
| 2023-03-05 | target/arm: Remove arm_free_cc, a64_free_cc | Richard Henderson |
| 2023-03-05 | accel/tcg: Remove translator_loop_temp_check | Richard Henderson |
| 2023-03-01 | target/arm: Don't use tcg_temp_local_new_* | Richard Henderson |
| 2023-03-01 | accel/tcg: Pass max_insn to gen_intermediate_code by pointer | Richard Henderson |
| 2023-03-01 | target/arm: Replace `TARGET_TB_PCREL` with `CF_PCREL` | Anton Johansson |
| 2023-02-27 | target/arm: move translate modules to tcg/ | Fabiano Rosas |
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