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path: root/target/arm/tcg/translate-a64.c
AgeCommit message (Expand)Author
2024-01-27target/arm: Fix A64 scalar SQSHRN and SQRSHRNPeter Maydell
2023-11-13target/arm: HVC at EL3 should go to EL3, not EL2Peter Maydell
2023-10-27target/arm: Fix syndrome for FGT traps on ERETPeter Maydell
2023-10-22target/arm: Use tcg_gen_ext_i64Richard Henderson
2023-10-04accel/tcg: Replace CPUState.env_ptr with cpu_env()Richard Henderson
2023-10-03tcg: Rename cpu_env to tcg_envRichard Henderson
2023-10-03target/arm: Replace TARGET_PAGE_ENTRY_EXTRAAnton Johansson
2023-09-21target/arm: Implement the CPY* instructionsPeter Maydell
2023-09-21target/arm: Implement the SETG* instructionsPeter Maydell
2023-09-21target/arm: Define new TB flag for ATA0Peter Maydell
2023-09-21target/arm: Implement the SET* instructionsPeter Maydell
2023-09-21target/arm: Pass unpriv bool to get_a64_user_mem_index()Peter Maydell
2023-09-21target/arm: Implement FEAT_HBCPeter Maydell
2023-09-08target/arm: Implement FEAT_TIDCP1Richard Henderson
2023-09-08target/arm: Implement HCR_EL2.TIDCPRichard Henderson
2023-09-08target/arm: Do not use gen_mte_checkN in trans_STGPRichard Henderson
2023-09-08target/arm: Inform helpers whether a PAC instruction is 'combined'Aaron Lindsay
2023-08-31target/arm: Allow cpu to configure GM blocksizeRichard Henderson
2023-08-24target/arm: Use tcg_gen_negsetcond_*Richard Henderson
2023-07-31target/arm: Fix MemOp for STGPRichard Henderson
2023-07-25arm: spelling fixesMichael Tokarev
2023-07-08target/arm: Demultiplex AESE and AESMCRichard Henderson
2023-06-19target/arm: Convert load/store tags insns to decodetreePeter Maydell
2023-06-19target/arm: Convert load/store single structure to decodetreePeter Maydell
2023-06-19target/arm: Convert load/store (multiple structures) to decodetreePeter Maydell
2023-06-19target/arm: Convert LDAPR/STLR (imm) to decodetreePeter Maydell
2023-06-19target/arm: Convert load (pointer auth) insns to decodetreePeter Maydell
2023-06-19target/arm: Convert atomic memory ops to decodetreePeter Maydell
2023-06-19target/arm: Convert LDR/STR reg+reg to decodetreePeter Maydell
2023-06-19target/arm: Convert LDR/STR with 12-bit immediate to decodetreePeter Maydell
2023-06-19target/arm: Convert ld/st reg+imm9 insns to decodetreePeter Maydell
2023-06-19target/arm: Convert load/store-pair to decodetreePeter Maydell
2023-06-19target/arm: Convert load reg (literal) group to decodetreePeter Maydell
2023-06-19target/arm: Convert LDXP, STXP, CASP, CAS to decodetreePeter Maydell
2023-06-19target/arm: Convert load/store exclusive and ordered to decodetreePeter Maydell
2023-06-19target/arm: Convert exception generation instructions to decodetreePeter Maydell
2023-06-19target/arm: Convert MSR (reg), MRS, SYS, SYSL to decodetreePeter Maydell
2023-06-19target/arm: Convert MSR (immediate) to decodetreePeter Maydell
2023-06-19target/arm: Convert CFINV, XAFLAG and AXFLAG to decodetreePeter Maydell
2023-06-19target/arm: Convert barrier insns to decodetreePeter Maydell
2023-06-19target/arm: Convert hint instruction space to decodetreePeter Maydell
2023-06-19target/arm: Consistently use finalize_memop_asimd() for ASIMD loads/storesPeter Maydell
2023-06-19target/arm: Pass memop to gen_mte_check1_mmuidx() in reg_imm9 decodePeter Maydell
2023-06-19target/arm: Return correct result for LDG when ATA=0Peter Maydell
2023-06-19target/arm: Fix return value from LDSMIN/LDSMAX 8/16 bit atomicsPeter Maydell
2023-06-06target/arm: Move mte check for store-exclusiveRichard Henderson
2023-06-06target/arm: Relax ordered/atomic alignment checks for LSE2Richard Henderson
2023-06-06target/arm: Add SCTLR.nAA to TBFLAG_A64Richard Henderson
2023-06-06target/arm: Check alignment in helper_mte_checkRichard Henderson
2023-06-06target/arm: Pass single_memop to gen_mte_checkNRichard Henderson
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