| Age | Commit message (Expand) | Author |
|---|---|---|
| 2021-05-25 | target/arm: Enable SVE2 and related extensions | Richard Henderson |
| 2021-04-06 | Revert "target/arm: Make number of counters in PMCR follow the CPU" | Peter Maydell |
| 2021-03-30 | target/arm: Make number of counters in PMCR follow the CPU | Peter Maydell |
| 2021-03-08 | target/arm: Restrict v7A TCG cpus to TCG accel | Philippe Mathieu-Daudé |
| 2021-03-05 | target/arm: Restrict v8M IDAU to TCG | Philippe Mathieu-Daudé |
| 2021-02-05 | cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass | Claudio Fontana |
| 2021-02-05 | cpu: move cc->do_interrupt to tcg_ops | Claudio Fontana |
| 2021-02-05 | cpu: Move cpu_exec_* to tcg_ops | Eduardo Habkost |
| 2021-01-08 | target/arm: Implement Cortex-M55 model | Peter Maydell |
| 2020-10-01 | target/arm: Add ID register values for Cortex-M0 | Peter Maydell |
| 2020-10-01 | target/arm: Move id_pfr0, id_pfr1 into ARMISARegisters | Peter Maydell |
| 2020-05-14 | target/arm: Use correct GDB XML for M-profile cores | Peter Maydell |
| 2020-05-11 | target/arm: Restrict TCG cpus to TCG accel | Philippe Mathieu-Daudé |
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index : slackcoder/qemu | |
| QEMU is a generic and open source machine & userspace emulator and virtualizer | Mirror |
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