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path: root/target-ppc/cpu.h
AgeCommit message (Expand)Author
2016-12-20Move target-* CPU file into a target/ folderThomas Huth
2016-11-23target-ppc: Allow eventual removal of old migration mistakesDavid Gibson
2016-11-23target-ppc: Fix CPU migration from qemu-2.6 <-> later versionsDavid Gibson
2016-09-23target-ppc: tlbie/tlbivax should have global effectNikunj A Dadhania
2016-09-23target-ppc: add TLB_NEED_LOCAL_FLUSH flagNikunj A Dadhania
2016-09-15Remove unused function declarationsLadi Prosek
2016-09-07ppc: Don't update NIP in facility unavailable interruptsBenjamin Herrenschmidt
2016-09-07ppc: Provide basic raise_exception_* functionsBenjamin Herrenschmidt
2016-09-07target-ppc: Introduce POWER ISA 3.0 flagNikunj A Dadhania
2016-08-10ppc: Introduce a function to look up CPU alias stringsThomas Huth
2016-07-12target-*: Clean up cpu.h header guardsMarkus Armbruster
2016-07-05ppc/hash64: Add proper real mode translation supportBenjamin Herrenschmidt
2016-07-01ppc: Update LPCR definitionsBenjamin Herrenschmidt
2016-06-29target-*: Don't redefine cpu_exec()Peter Crosthwaite
2016-06-23ppc: Add P7/P8 Power Management instructionsBenjamin Herrenschmidt
2016-06-23ppc: Add real mode CI load/store instructions for P7 and P8Benjamin Herrenschmidt
2016-06-23ppc: Fix POWER7 and POWER8 exception definitionsBenjamin Herrenschmidt
2016-06-14ppc: Improve PCR bit selection in ppc_set_compat()Thomas Huth
2016-06-14ppc: Split pcr_mask settings into supported bits and the register maskThomas Huth
2016-06-07Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell
2016-06-07virtio: move bi-endian target support to a single locationGreg Kurz
2016-06-07ppc: Batch TLB flushes on 32-bit 6xx/7xx/7xxx in hash modeBenjamin Herrenschmidt
2016-06-07ppc: Better figure out if processor has HV modeBenjamin Herrenschmidt
2016-05-30ppc: Do some batching of TCG tlb flushesBenjamin Herrenschmidt
2016-05-30ppc: Use split I/D mmu modes to avoid flushes on interruptsBenjamin Herrenschmidt
2016-05-30ppc: Remove MMU_MODEn_SUFFIX definitionsBenjamin Herrenschmidt
2016-05-19cpu: move exec-all.h inclusion out of cpu.hPaolo Bonzini
2016-05-19target-ppc: make cpu-qom.h not target specificPaolo Bonzini
2016-05-12tb: consistently use uint32_t for tb->flagsEmilio G. Cota
2016-04-18ppc: Fix the range check in the LSWI instructionThomas Huth
2016-04-05ppc: Rework POWER7 & POWER8 exception modelCédric Le Goater
2016-03-24ppc: A couple more dummy POWER8 Book4 regsBenjamin Herrenschmidt
2016-03-24ppc: Add dummy CIABR SPRBenjamin Herrenschmidt
2016-03-24ppc: Add POWER8 IAMR registerBenjamin Herrenschmidt
2016-03-24ppc: Add dummy SPR_IC for POWER8Benjamin Herrenschmidt
2016-03-24ppc: Create cpu_ppc_set_papr() helperBenjamin Herrenschmidt
2016-03-24ppc: Update SPR definitionsBenjamin Herrenschmidt
2016-03-16ppc: Add a few more P8 PMU SPRsBenjamin Herrenschmidt
2016-03-16ppc: Define the PSPB register on POWER8Thomas Huth
2016-02-23all: Clean up includesPeter Maydell
2016-02-01target-ppc: mcrfs should always update FEX/VX and only clear exception bitsJames Clarke
2016-01-30target-ppc: Make every FPSCR_ macro have a corresponding FP_ macroJames Clarke
2016-01-30target-ppc: Rework SLB page size lookupDavid Gibson
2016-01-30target-ppc: rename and export maybe_bswap_register()Greg Kurz
2016-01-30ppc: Clean up error handling in ppc_set_compat()David Gibson
2015-11-30target-ppc: Move the FPSCR bit update macros to cpu.hMadhavan Srinivasan
2015-11-11ppc: Add/Re-introduce MMU model definitions needed by PR KVMBharata B Rao
2015-10-23ppc/spapr: Add "ibm,pa-features" property to the device-treeBenjamin Herrenschmidt
2015-10-23ppc: Add mmu_model defines for arch 2.03 and 2.07Benjamin Herrenschmidt
2015-10-07target-*: Drop cpu_gen_code defineRichard Henderson
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