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AgeCommit message (Expand)Author
2024-09-09softmmu: Support concurrent bounce buffersMattias Nissler
2024-09-06Merge tag 'pull-target-arm-20240905' of https://git.linaro.org/people/pmaydel...Peter Maydell
2024-09-05hm/nvram/xlnx-versal-efuse-ctrl: Call register_finalize_blockPeter Maydell
2024-09-05hw/misc/xlnx-versal-trng: Call register_finalize_blockPeter Maydell
2024-09-05hw/nvram/xlnx-zynqmp-efuse: Call register_finalize_blockPeter Maydell
2024-09-05hw/nvram/xlnx-bbram: Call register_finalize_blockPeter Maydell
2024-09-05hw/arm/virt: Default to two-stage SMMU from virt-9.2Peter Maydell
2024-09-05hw: add compat machines for 9.2Cornelia Huck
2024-09-04hw/xen: pvh-common: Add support for creating PCIe/GPEXEdgar E. Iglesias
2024-09-04hw/arm: xenpvh: Break out a common PVH machineEdgar E. Iglesias
2024-08-12arm/virt: place power button pin number on a defineMauro Carvalho Chehab
2024-08-06hw/loongarch/virt: Replace Loongson IPI with LoongArch IPIBibo Mao
2024-08-06hw/intc/loongarch_ipi: Add loongarch IPI supportBibo Mao
2024-08-06hw/intc/loongson_ipi: Move common code to loongson_ipi_common.cBibo Mao
2024-08-06hw/intc/loongson_ipi: Expose loongson_ipi_core_read/write helpersBibo Mao
2024-08-06hw/intc/loongson_ipi: Add LoongsonIPICommonClass::cpu_by_arch_id handlerBibo Mao
2024-08-06hw/intc/loongson_ipi: Add LoongsonIPICommonClass::get_iocsr_as handlerBibo Mao
2024-08-06hw/intc/loongson_ipi: Move IPICore structure to loongson_ipi_common.hBibo Mao
2024-08-06hw/intc/loongson_ipi: Move IPICore::mmio_mem to LoongsonIPIStateBibo Mao
2024-08-06hw/intc/loongson_ipi: Move common definitions to loongson_ipi_common.hBibo Mao
2024-08-06hw/intc/loongson_ipi: Add TYPE_LOONGSON_IPI_COMMON stubBibo Mao
2024-08-06hw/intc/loongson_ipi: Rename LoongsonIPI -> LoongsonIPIStateBibo Mao
2024-08-02virtio-net: Fix network stall at the host side waiting for kickthomas
2024-08-01Revert "hw/pci: Rename has_power to enabled"Michael S. Tsirkin
2024-08-01Revert "pcie_sriov: Ensure VF function number does not overflow"Michael S. Tsirkin
2024-08-01Revert "pcie_sriov: Reuse SR-IOV VF device instances"Michael S. Tsirkin
2024-08-01Revert "pcie_sriov: Remove num_vfs from PCIESriovPF"Michael S. Tsirkin
2024-08-01Revert "pcie_sriov: Register VFs after migration"Michael S. Tsirkin
2024-08-01Revert "pcie_sriov: Allow user to create SR-IOV device"Michael S. Tsirkin
2024-08-01Revert "virtio-pci: Implement SR-IOV PF"Michael S. Tsirkin
2024-07-31target/i386/cpu: Mask off SGX/SGX_LC feature words for non-PC machineZhao Liu
2024-07-26pnv/xive2: Dump more END state with 'info pic'Frederic Barrat
2024-07-26pnv/xive2: Move xive2_nvp_pic_print_info() to xive2.cFrederic Barrat
2024-07-26pnv/xive: Support cache flush and queue sync inject with notificationsNicholas Piggin
2024-07-26hw/ppc: SPI controller wiring to P10 chipChalapathi V
2024-07-26hw/ssi: Extend SPI modelChalapathi V
2024-07-26hw/ssi: Add SPI modelChalapathi V
2024-07-26ppc/pnv: Remove ppc target dependency from pnv_xscom.hChalapathi V
2024-07-26ppc/pnv: Add an LPAR per core machine optionNicholas Piggin
2024-07-26ppc/pnv: Implement POWER10 PC xscom registers for direct controlsNicholas Piggin
2024-07-26ppc/pnv: Add a CPU nmi and resume functionNicholas Piggin
2024-07-26ppc/pnv: Add POWER10 ChipTOD quirk for big-coreNicholas Piggin
2024-07-26ppc/pnv: Add a big-core mode that joins two regular coresNicholas Piggin
2024-07-26ppc/pnv: Extend chip_pir class method to TIR as wellNicholas Piggin
2024-07-26ppc/pnv: use class attribute to limit SMT threads for different machinesNicholas Piggin
2024-07-26target/ppc: Move SPR indirect registers into PnvCoreNicholas Piggin
2024-07-26ppc/pnv: Move timebase state into PnvCoreNicholas Piggin
2024-07-26ppc/pnv: Add pointer from PnvCPUState to PnvCoreNicholas Piggin
2024-07-26ppc/pnv: Implement ADU access to LPC spaceNicholas Piggin
2024-07-26ppc/pnv: Begin a more complete ADU LPC model for POWER9/10Nicholas Piggin
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