Age | Commit message (Expand) | Author |
---|---|---|
2021-10-22 | hw/riscv: opentitan: Update to the latest build | Alistair Francis |
2021-07-15 | hw/riscv: opentitan: Add the flash alias | Alistair Francis |
2021-07-15 | hw/riscv: opentitan: Add the unimplement rv_core_ibex_peri | Alistair Francis |
2021-06-24 | hw/riscv: OpenTitan: Connect the mtime and mtimecmp timer | Alistair Francis |
2021-05-11 | hw/opentitan: Update the interrupt layout | Alistair Francis |
2020-12-17 | riscv/opentitan: Update the OpenTitan memory layout | Alistair Francis |
2020-09-18 | Use OBJECT_DECLARE_SIMPLE_TYPE when possible | Eduardo Habkost |
2020-09-09 | Use DECLARE_*CHECKER* macros | Eduardo Habkost |
2020-09-09 | Move QOM typedefs and add missing includes | Eduardo Habkost |
2020-08-27 | opentitan: Rename memmap enum constants | Eduardo Habkost |
2020-06-19 | riscv/opentitan: Connect the UART device | Alistair Francis |
2020-06-19 | riscv/opentitan: Connect the PLIC device | Alistair Francis |
2020-06-03 | riscv: Initial commit of OpenTitan machine | Alistair Francis |