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AgeCommit message (Expand)Author
2023-01-08include: Include headers where neededMarkus Armbruster
2023-01-07Merge tag 'pull-loongarch-20230106' of https://gitlab.com/gaosong/qemu into s...Peter Maydell
2023-01-06hw/intc/loongarch_pch: Change default irq number of pch irq controllerTianrui Zhao
2023-01-06hw/intc/loongarch_pch_pic: add irq number propertyTianrui Zhao
2023-01-06hw/intc/loongarch_pch_msi: add irq number propertyTianrui Zhao
2023-01-06hw/intc: sifive_plic: Drop PLICMode_HBin Meng
2022-09-07hw/intc: Move mtimer/mtimecmp to aclintAtish Patra
2022-08-31hw/intc/ppc-uic: Convert ppc-uic to a PPC4xx DCR deviceBALATON Zoltan
2022-07-05hw/intc/loongarch_ipi: Fix ipi device access of 64bitsXiaojuan Yang
2022-07-04hw/intc/loongarch_pch_msi: Fix msi vector convertionMao Bibo
2022-06-06hw/intc: Add LoongArch extioi interrupt controller(EIOINTC)Xiaojuan Yang
2022-06-06hw/intc: Add LoongArch ls7a msi interrupt controller support(PCH-MSI)Xiaojuan Yang
2022-06-06hw/intc: Add LoongArch ls7a interrupt controller support(PCH-PIC)Xiaojuan Yang
2022-06-06hw/loongarch: Add LoongArch ipi interrupt support(IPI)Xiaojuan Yang
2022-05-19hw/intc/arm_gicv3: Use correct number of priority bits for the CPUPeter Maydell
2022-05-19hw/intc/arm_gicv3: Support configurable number of physical priority bitsPeter Maydell
2022-05-11Clean up decorations and whitespace around header guardsMarkus Armbruster
2022-05-11Clean up ill-advised or unusual header guardsMarkus Armbruster
2022-04-26hw/intc: Vectored Interrupt Controller (VIC)Amir Gonnen
2022-04-22Merge tag 'pull-target-arm-20220422-1' of https://git.linaro.org/people/pmayd...Richard Henderson
2022-04-22hw/intc/arm_gicv3_cpuif: Support vLPIsPeter Maydell
2022-04-22hw/intc/arm_gicv3: Implement new GICv4 redistributor registersPeter Maydell
2022-04-22hw/intc/arm_gicv3: Implement GICv4's new redistributor framePeter Maydell
2022-04-22hw/intc/arm_gicv3_its: Implement VMOVPPeter Maydell
2022-04-22hw/intc/arm_gicv3: Keep pointers to every connected ITSPeter Maydell
2022-04-22hw/intc/arm_gicv3_its: Implement GITS_BASER2 for GICv4Peter Maydell
2022-04-22hw/intc: Make RISC-V ACLINT mtime MMIO register writableFrank Chang
2022-04-21hw/arm/exynos4210: Put combiners into state structPeter Maydell
2022-04-21hw/arm/exynos4210: Put external GIC into state structPeter Maydell
2022-03-03hw/intc: Add RISC-V AIA IMSIC device emulationAnup Patel
2022-02-16hw/intc: Add RISC-V AIA APLIC device emulationAnup Patel
2022-02-16include: hw: remove ibex_plic.hWilfred Mallawa
2022-02-08hw/intc/arm_gicv3_its: Drop TableDesc and CmdQDesc valid fieldsPeter Maydell
2022-01-28hw/intc/arm_gicv3_its: Check table bounds against correct limitPeter Maydell
2022-01-07hw/intc/arm_gicv3_its: Fix various off-by-one errorsPeter Maydell
2022-01-07hw/intc/arm_gicv3_its: Remove maxids union from TableDescPeter Maydell
2021-11-15hw/intc/arm_gicv3: Support multiple redistributor regionsPeter Maydell
2021-11-15hw/intc/arm_gicv3: Move checking of redist-region-count to arm_gicv3_common_r...Peter Maydell
2021-11-09hw/m68k: Fix typo in SPDX tagPhilippe Mathieu-Daudé
2021-09-21hw/intc: Upgrade the SiFive CLINT implementation to RISC-V ACLINTAnup Patel
2021-09-21hw/intc: Rename sifive_clint sources to riscv_aclint sourcesAnup Patel
2021-09-21hw/intc: sifive_plic: Convert the PLIC to use RISC-V CPU GPIO linesAlistair Francis
2021-09-21hw/intc: ibex_plic: Convert the PLIC to use RISC-V CPU GPIO linesAlistair Francis
2021-09-21hw/intc: sifive_clint: Use RISC-V CPU GPIO linesAlistair Francis
2021-09-13hw/intc: GICv3 redistributor ITS processingShashi Mallela
2021-09-13hw/intc: GICv3 ITS Feature enablementShashi Mallela
2021-09-13hw/intc: GICv3 ITS Command processingShashi Mallela
2021-09-13hw/intc: GICv3 ITS register definitions addedShashi Mallela
2021-09-13hw/intc: GICv3 ITS initial frameworkShashi Mallela
2021-09-01arm: Move system PPB container handling to armv7mPeter Maydell
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