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QEMU is a generic and open source machine & userspace emulator and virtualizer
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arm_gicv3_common.h
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5 days
hw/intc/arm_gicv3: Use bitops.h uint32_t bit array functions
Peter Maydell
2024-04-25
hw/intc/arm_gicv3: Add NMI handling CPU interface registers
Peter Maydell
2024-04-25
hw/intc/arm_gicv3: Add irq non-maskable property
Jinjie Ruan
2024-04-25
hw/intc/arm_gicv3: Add has-nmi property to GICv3 device
Jinjie Ruan
2024-04-25
hw/intc/arm_gicv3: Add external IRQ lines for NMI
Jinjie Ruan
2023-06-28
hw/intc/arm_gic: Un-inline GIC*/ITS class_name() helpers
Philippe Mathieu-Daudé
2022-05-19
hw/intc/arm_gicv3: Use correct number of priority bits for the CPU
Peter Maydell
2022-05-19
hw/intc/arm_gicv3: Support configurable number of physical priority bits
Peter Maydell
2022-04-22
hw/intc/arm_gicv3_cpuif: Support vLPIs
Peter Maydell
2022-04-22
hw/intc/arm_gicv3: Implement new GICv4 redistributor registers
Peter Maydell
2022-04-22
hw/intc/arm_gicv3: Implement GICv4's new redistributor frame
Peter Maydell
2022-04-22
hw/intc/arm_gicv3: Keep pointers to every connected ITS
Peter Maydell
2021-11-15
hw/intc/arm_gicv3: Support multiple redistributor regions
Peter Maydell
2021-11-15
hw/intc/arm_gicv3: Move checking of redist-region-count to arm_gicv3_common_r...
Peter Maydell
2021-09-13
hw/intc: GICv3 redistributor ITS processing
Shashi Mallela
2021-09-13
hw/intc: GICv3 ITS Feature enablement
Shashi Mallela
2021-09-13
hw/intc: GICv3 ITS Command processing
Shashi Mallela
2021-09-13
hw/intc: GICv3 ITS register definitions added
Shashi Mallela
2020-11-02
hw/intc/arm_gicv3_cpuif: Make GIC maintenance interrupts work
Peter Maydell
2020-09-09
Use DECLARE_*CHECKER* macros
Eduardo Habkost
2020-09-09
Move QOM typedefs and add missing includes
Eduardo Habkost
2018-10-26
hw/intc/gicv3: Remove useless parenthesis around DIV_ROUND_UP macro
Philippe Mathieu-Daudé
2018-06-22
hw/intc/arm_gicv3: Introduce redist-region-count array property
Eric Auger
2018-06-08
arm_gicv3_kvm: kvm_dist_get/put: skip the registers banked by GICR
Shannon Zhao
2017-02-28
hw/intc/arm_gicv3_kvm: Add ICC_SRE_EL1 register to vmstate
Vijaya Kumar K
2017-01-20
hw/intc/arm_gicv3: Implement gicv3_cpuif_virt_update()
Peter Maydell
2017-01-20
hw/intc/gicv3: Add data fields for virtualization support
Peter Maydell
2017-01-20
hw/intc/arm_gicv3: Add external IRQ lines for VIRQ and VFIQ
Peter Maydell
2016-07-14
gic: provide defines for v2/v3 targetlist sizes
Andrew Jones
2016-06-17
hw/intc/arm_gicv3: Implement functions to identify next pending irq
Peter Maydell
2016-06-17
hw/intc/arm_gicv3: Move irq lines into GICv3CPUState structure
Peter Maydell
2016-06-17
hw/intc/arm_gicv3: Add state information
Pavel Fedin
2015-09-24
hw/intc: Implement GIC-500 base class
Shlomo Pongratz