aboutsummaryrefslogtreecommitdiff
path: root/include/hw/intc/arm_gicv3_common.h
AgeCommit message (Expand)Author
5 dayshw/intc/arm_gicv3: Use bitops.h uint32_t bit array functionsPeter Maydell
2024-04-25hw/intc/arm_gicv3: Add NMI handling CPU interface registersPeter Maydell
2024-04-25hw/intc/arm_gicv3: Add irq non-maskable propertyJinjie Ruan
2024-04-25hw/intc/arm_gicv3: Add has-nmi property to GICv3 deviceJinjie Ruan
2024-04-25hw/intc/arm_gicv3: Add external IRQ lines for NMIJinjie Ruan
2023-06-28hw/intc/arm_gic: Un-inline GIC*/ITS class_name() helpersPhilippe Mathieu-Daudé
2022-05-19hw/intc/arm_gicv3: Use correct number of priority bits for the CPUPeter Maydell
2022-05-19hw/intc/arm_gicv3: Support configurable number of physical priority bitsPeter Maydell
2022-04-22hw/intc/arm_gicv3_cpuif: Support vLPIsPeter Maydell
2022-04-22hw/intc/arm_gicv3: Implement new GICv4 redistributor registersPeter Maydell
2022-04-22hw/intc/arm_gicv3: Implement GICv4's new redistributor framePeter Maydell
2022-04-22hw/intc/arm_gicv3: Keep pointers to every connected ITSPeter Maydell
2021-11-15hw/intc/arm_gicv3: Support multiple redistributor regionsPeter Maydell
2021-11-15hw/intc/arm_gicv3: Move checking of redist-region-count to arm_gicv3_common_r...Peter Maydell
2021-09-13hw/intc: GICv3 redistributor ITS processingShashi Mallela
2021-09-13hw/intc: GICv3 ITS Feature enablementShashi Mallela
2021-09-13hw/intc: GICv3 ITS Command processingShashi Mallela
2021-09-13hw/intc: GICv3 ITS register definitions addedShashi Mallela
2020-11-02hw/intc/arm_gicv3_cpuif: Make GIC maintenance interrupts workPeter Maydell
2020-09-09Use DECLARE_*CHECKER* macrosEduardo Habkost
2020-09-09Move QOM typedefs and add missing includesEduardo Habkost
2018-10-26hw/intc/gicv3: Remove useless parenthesis around DIV_ROUND_UP macroPhilippe Mathieu-Daudé
2018-06-22hw/intc/arm_gicv3: Introduce redist-region-count array propertyEric Auger
2018-06-08arm_gicv3_kvm: kvm_dist_get/put: skip the registers banked by GICRShannon Zhao
2017-02-28hw/intc/arm_gicv3_kvm: Add ICC_SRE_EL1 register to vmstateVijaya Kumar K
2017-01-20hw/intc/arm_gicv3: Implement gicv3_cpuif_virt_update()Peter Maydell
2017-01-20hw/intc/gicv3: Add data fields for virtualization supportPeter Maydell
2017-01-20hw/intc/arm_gicv3: Add external IRQ lines for VIRQ and VFIQPeter Maydell
2016-07-14gic: provide defines for v2/v3 targetlist sizesAndrew Jones
2016-06-17hw/intc/arm_gicv3: Implement functions to identify next pending irqPeter Maydell
2016-06-17hw/intc/arm_gicv3: Move irq lines into GICv3CPUState structurePeter Maydell
2016-06-17hw/intc/arm_gicv3: Add state informationPavel Fedin
2015-09-24hw/intc: Implement GIC-500 base classShlomo Pongratz