aboutsummaryrefslogtreecommitdiff
path: root/hw/ssi
AgeCommit message (Expand)Author
2022-10-24aspeed/smc: Cache AspeedSMCClassCédric Le Goater
2022-10-24ssi: cache SSIPeripheralClass to avoid GET_CLASS()Alex Bennée
2022-10-14hw/ssi: ibex_spi: fixup/add rw1c functionalityWilfred Mallawa
2022-10-14hw/ssi: ibex_spi: fixup coverity issueWilfred Mallawa
2022-09-27hw/ssi: ibex_spi: update reg addrWilfred Mallawa
2022-09-27hw/ssi: ibex_spi: fixup typos in ibex_spi_hostWilfred Mallawa
2022-06-30aspeed/smc: Fix potential overflowCédric Le Goater
2022-05-02aspeed/smc: Add AST1030 supportSteven Lee
2022-04-22hw/ssi: Add Ibex SPI device modelWilfred Mallawa
2022-03-08aspeed/smc: Fix error logCédric Le Goater
2022-03-08aspeed/smc: Let the SSI core layer define the bus nameCédric Le Goater
2022-03-08aspeed/smc: Rename 'max_peripherals' to 'cs_num_max'Cédric Le Goater
2022-03-08aspeed/smc: Remove 'num_cs' fieldCédric Le Goater
2022-03-08aspeed/smc: Use max number of CE instead of 'num_cs'Cédric Le Goater
2022-03-02migration: Remove load_state_old and minimum_version_id_oldPeter Maydell
2022-02-26aspeed/smc: Add an address mask on segment registersCédric Le Goater
2022-01-28hw/ssi: Add a model of Xilinx Versal's OSPI flash memory controllerFrancisco Iglesias
2021-10-22aspeed/smc: Use a container for the flash mmio address spaceCédric Le Goater
2021-10-12aspeed/smc: Dump address offset in trace eventsCédric Le Goater
2021-10-12aspeed/smc: Introduce a new addr_width() class handlerCédric Le Goater
2021-10-12aspeed/smc: Add default reset valuesCédric Le Goater
2021-10-12aspeed/smc: QOMify AspeedSMCFlashCédric Le Goater
2021-10-12aspeed/smc: Rename AspeedSMCFlash 'id' to 'cs'Cédric Le Goater
2021-10-12aspeed/smc: Remove the 'size' attribute from AspeedSMCFlashCédric Le Goater
2021-10-12aspeed/smc: Drop AspeedSMCController structureCédric Le Goater
2021-10-12aspeed/smc: Stop using the model name for the memory regionsCédric Le Goater
2021-10-12aspeed/smc: Introduce aspeed_smc_error() helperCédric Le Goater
2021-10-12aspeed/smc: Add watchdog Control/Status RegistersCédric Le Goater
2021-09-30qbus: Rename qbus_create() to qbus_new()Peter Maydell
2021-05-05Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.1-pul...Peter Maydell
2021-05-02Do not include exec/address-spaces.h if it's not really necessaryThomas Huth
2021-05-02Do not include sysemu/sysemu.h if it's not really necessaryThomas Huth
2021-05-02hw: Do not include qemu/log.h if it is not necessaryThomas Huth
2021-05-01aspeed/smc: Add extra controls to request DMACédric Le Goater
2021-05-01aspeed/smc: Add a 'features' attribute to the object classCédric Le Goater
2021-05-01hw/arm/aspeed: Do not sysbus-map mmio flash region directly, use aliasPhilippe Mathieu-Daudé
2021-05-01aspeed/smc: Remove unused "sdram-base" propertyCédric Le Goater
2021-05-01aspeed/smc: Use the RAM memory region for DMAsCédric Le Goater
2021-03-10hw/ssi: xilinx_spips: Remove DMA related dead codes from zynqmp_spipsXuzhou Cheng
2021-03-10hw/ssi: xilinx_spips: Clean up coding convention issuesXuzhou Cheng
2021-03-04hw/ssi: Add SiFive SPI controller supportBin Meng
2021-02-02hw/ssi: imx_spi: Correct tx and rx fifo endiannessBin Meng
2021-02-02hw/ssi: imx_spi: Correct the burst length > 32 bit transfer logicBin Meng
2021-02-02hw/ssi: imx_spi: Round up the burst length to be multiple of 8Bin Meng
2021-02-02hw/ssi: imx_spi: Disable chip selects when controller is disabledXuzhou Cheng
2021-02-02hw/ssi: imx_spi: Rework imx_spi_write() to handle block disabledPhilippe Mathieu-Daudé
2021-02-02hw/ssi: imx_spi: Rework imx_spi_read() to handle block disabledPhilippe Mathieu-Daudé
2021-02-02hw/ssi: imx_spi: Rework imx_spi_reset() to keep CONREG register valuePhilippe Mathieu-Daudé
2021-02-02hw/ssi: imx_spi: Remove pointless variable initializationPhilippe Mathieu-Daudé
2021-02-02hw/ssi: imx_spi: Remove imx_spi_update_irq() in imx_spi_reset()Bin Meng
generated by cgit v1.2.3 (git 2.26.2) at 2024-12-02 15:53:54 +0000