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QEMU is a generic and open source machine & userspace emulator and virtualizer
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spike.c
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Author
2024-02-09
target/riscv: support new isa extension detection devicetree properties
Conor Dooley
2023-06-26
hw/riscv: Validate cluster and NUMA node boundary
Gavin Shan
2023-05-05
hw/riscv: Add signature dump function for spike to run ACT tests
Weiwei Li
2023-02-16
hw/riscv/boot.c: consolidate all kernel init in riscv_load_kernel()
Daniel Henrique Barboza
2023-02-16
hw/riscv: handle 32 bit CPUs kernel_entry in riscv_load_kernel()
Daniel Henrique Barboza
2023-02-07
hw/riscv: change riscv_compute_fdt_addr() semantics
Daniel Henrique Barboza
2023-02-07
hw/riscv: split fdt address calculation from fdt load
Daniel Henrique Barboza
2023-02-07
hw/riscv/spike.c: rename MachineState 'mc' pointers to' ms'
Daniel Henrique Barboza
2023-01-20
hw/riscv: use ms->fdt in riscv_socket_fdt_write_distance_matrix()
Daniel Henrique Barboza
2023-01-20
hw/riscv: use MachineState::fdt in riscv_socket_fdt_write_id()
Daniel Henrique Barboza
2023-01-20
hw/riscv/spike.c: simplify create_fdt()
Daniel Henrique Barboza
2023-01-20
hw/riscv/boot.c: use MachineState in riscv_load_kernel()
Daniel Henrique Barboza
2023-01-20
hw/riscv/boot.c: use MachineState in riscv_load_initrd()
Daniel Henrique Barboza
2023-01-20
hw/riscv: write bootargs 'chosen' FDT after riscv_load_kernel()
Daniel Henrique Barboza
2023-01-20
hw/riscv: write initrd 'chosen' FDT inside riscv_load_initrd()
Daniel Henrique Barboza
2023-01-20
hw/riscv/spike.c: load initrd right after riscv_load_kernel()
Daniel Henrique Barboza
2023-01-20
hw/riscv/spike: use 'fdt' from MachineState
Daniel Henrique Barboza
2023-01-20
hw/riscv: spike: Decouple create_fdt() dependency to ELF loading
Bin Meng
2023-01-20
hw/riscv/boot.c: introduce riscv_default_firmware_name()
Daniel Henrique Barboza
2023-01-20
hw/riscv: spike: Remove the out-of-date comments
Bin Meng
2023-01-20
hw/char: riscv_htif: Move registers from CPUArchState to HTIFState
Bin Meng
2023-01-20
hw/char: riscv_htif: Drop useless assignment of memory region
Bin Meng
2023-01-06
hw/riscv: spike: Remove misleading comments
Bin Meng
2022-10-17
hw/riscv: set machine->fdt in spike_board_init()
Daniel Henrique Barboza
2022-09-07
hw/riscv: remove 'fdt' param from riscv_setup_rom_reset_vec()
Daniel Henrique Barboza
2022-05-24
hw/riscv: Make CPU config error handling generous (virt/spike)
Tsukasa OI
2022-04-29
hw/riscv: Don't add empty bootargs to device tree
Bin Meng
2022-04-29
hw/riscv: spike: Add '/chosen/stdout-path' in device tree unconditionally
Bin Meng
2022-01-21
hw/riscv: Remove macros for ELF BIOS image names
Anup Patel
2022-01-21
hw/riscv: spike: Allow using binary firmware as bios
Anup Patel
2021-10-22
hw/riscv: spike: Use MachineState::ram and MachineClass::default_ram_id
Bin Meng
2021-09-21
hw/intc: Upgrade the SiFive CLINT implementation to RISC-V ACLINT
Anup Patel
2021-09-21
hw/intc: Rename sifive_clint sources to riscv_aclint sources
Anup Patel
2021-08-26
arch_init.h: Don't include arch_init.h unnecessarily
Peter Maydell
2021-06-08
hw/riscv: Use macros for BIOS image names
Bin Meng
2021-06-08
hw/riscv: Support the official CLINT DT bindings
Bin Meng
2021-05-02
hw: Do not include qemu/log.h if it is not necessary
Thomas Huth
2021-03-09
qtest: delete superfluous inclusions of qtest.h
Chen Qun
2021-03-04
hw/riscv: Drop 'struct MemmapEntry'
Bin Meng
2021-01-16
riscv: Pass RISCVHartArrayState by pointer
Alistair Francis
2020-12-17
hw/riscv: Use the CPU to determine if 32-bit
Alistair Francis
2020-12-17
hw/riscv: spike: Remove compile time XLEN checks
Alistair Francis
2020-12-17
hw/riscv: boot: Remove compile time XLEN checks
Alistair Francis
2020-12-17
riscv: spike: Remove target macro conditionals
Alistair Francis
2020-10-22
hw/riscv: Load the kernel after the firmware
Alistair Francis
2020-09-09
hw/riscv: Move riscv_htif model to hw/char
Bin Meng
2020-09-09
hw/riscv: Move sifive_clint model to hw/intc
Bin Meng
2020-09-09
hw/riscv: clint: Avoid using hard-coded timebase frequency
Bin Meng
2020-08-25
hw/riscv: spike: Allow creating multiple NUMA sockets
Anup Patel
2020-08-25
hw/riscv: Allow creating multiple instances of CLINT
Anup Patel
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