| Age | Commit message (Expand) | Author |
|---|
| 2020-03-17 | Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging | Peter Maydell |
| 2020-03-17 | hw/riscv: Let devices own the MemoryRegion they create | Philippe Mathieu-Daudé |
| 2020-03-16 | riscv: sifive_u: Update BIOS_FILENAME for 32-bit | Bin Meng |
| 2020-02-27 | hw/riscv: Provide rdtime callback for TCG in CLINT emulation | Anup Patel |
| 2020-01-16 | riscv/sifive_u: fix a memory leak in soc_realize() | Pan Nengyuan |
| 2019-11-25 | hw/riscv: Add optional symbol callback ptr to riscv_load_kernel() | Zhuang, Siwei (Data61, Kensington NSW) |
| 2019-10-28 | riscv/sifive_u: Add the start-in-flash property | Alistair Francis |
| 2019-10-28 | riscv/sifive_u: Manually define the machine | Alistair Francis |
| 2019-10-28 | riscv/sifive_u: Add QSPI memory region | Alistair Francis |
| 2019-10-28 | riscv/sifive_u: Add L2-LIM cache memory | Alistair Francis |
| 2019-10-28 | riscv: sifive_u: Add ethernet0 to the aliases node | Bin Meng |
| 2019-10-28 | riscv: hw: Drop "clock-frequency" property of cpu nodes | Bin Meng |
| 2019-09-17 | riscv: sifive_u: Update model and compatible strings in device tree | Bin Meng |
| 2019-09-17 | riscv: sifive_u: Remove handcrafted clock nodes for UART and ethernet | Bin Meng |
| 2019-09-17 | riscv: sifive_u: Fix broken GEM support | Bin Meng |
| 2019-09-17 | riscv: sifive_u: Instantiate OTP memory with a serial number | Bin Meng |
| 2019-09-17 | riscv: sifive_u: Change UART node name in device tree | Bin Meng |
| 2019-09-17 | riscv: sifive_u: Update UART base addresses and IRQs | Bin Meng |
| 2019-09-17 | riscv: sifive_u: Reference PRCI clocks in UART and ethernet nodes | Bin Meng |
| 2019-09-17 | riscv: sifive_u: Add PRCI block to the SoC | Bin Meng |
| 2019-09-17 | riscv: sifive_u: Generate hfclk and rtcclk nodes | Bin Meng |
| 2019-09-17 | riscv: sifive_u: Update PLIC hart topology configuration string | Bin Meng |
| 2019-09-17 | riscv: sifive_u: Update hart configuration to reflect the real FU540 SoC | Bin Meng |
| 2019-09-17 | riscv: sifive_u: Set the minimum number of cpus to 2 | Bin Meng |
| 2019-09-17 | riscv: sifive_u: Remove the unnecessary include of prci header | Bin Meng |
| 2019-09-17 | riscv: hw: Change create_fdt() to return void | Bin Meng |
| 2019-09-17 | riscv: hw: Remove not needed PLIC properties in device tree | Bin Meng |
| 2019-09-17 | riscv: hw: Use qemu_fdt_setprop_cell() for property with only 1 cell | Bin Meng |
| 2019-09-17 | riscv: hw: Remove superfluous "linux, phandle" property | Bin Meng |
| 2019-09-17 | riscv: sifive_u: Fix clock-names property for ethernet node | Guenter Roeck |
| 2019-09-17 | riscv: sivive_u: Add dummy serial clock and aliases entry for uart | Guenter Roeck |
| 2019-09-17 | riscv: sifive_u: Add support for loading initrd | Guenter Roeck |
| 2019-08-16 | Include sysemu/sysemu.h a lot less | Markus Armbruster |
| 2019-08-16 | Include hw/hw.h exactly where needed | Markus Armbruster |
| 2019-07-18 | hw/riscv: Load OpenSBI as the default firmware | Alistair Francis |
| 2019-07-05 | hw/riscv: Replace global smp variables with machine smp properties | Like Xu |
| 2019-06-27 | hw/riscv: Add support for loading a firmware | Alistair Francis |
| 2019-06-27 | hw/riscv: Split out the boot functions | Alistair Francis |
| 2019-06-27 | riscv: sifive_u: Update the plic hart config to support multicore | Bin Meng |
| 2019-06-27 | riscv: sifive_u: Do not create hard-coded phandles in DT | Bin Meng |
| 2019-03-19 | riscv: sifive_u: Correct UART0's IRQ in the device tree | Bin Meng |
| 2019-03-19 | riscv: sifive_u: Allow up to 4 CPUs to be created | Alistair Francis |
| 2019-02-11 | riscv: Ensure the kernel start address is correctly cast | Alistair Francis |
| 2019-02-05 | elf: Add optional function ptr to load_elf() to parse ELF notes | Liam Merwick |
| 2018-12-20 | RISC-V: Enable second UART on sifive_e and sifive_u | Michael Clark |
| 2018-12-20 | sifive_u: Set 'clock-frequency' DT property for SiFive UART | Anup Patel |
| 2018-12-20 | sifive_u: Add clock DT node for GEM ethernet | Anup Patel |
| 2018-10-17 | RISC-V: Don't add NULL bootargs to device-tree | Michael Clark |
| 2018-09-24 | Drop "qemu:" prefix from error_report() arguments | Mao Zhongyi |
| 2018-07-19 | sifive_u: Fix crash when introspecting the device | Alistair Francis |
