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path: root/hw/intc/gicv3_internal.h
AgeCommit message (Expand)Author
2024-04-25hw/intc/arm_gicv3: Handle icv_nmiar1_read() for icc_nmiar1_read()Peter Maydell
2024-04-25hw/intc/arm_gicv3: Add NMI handling CPU interface registersPeter Maydell
2024-04-25hw/intc/arm_gicv3: Implement GICD_INMIRJinjie Ruan
2024-04-25hw/intc/arm_gicv3_redist: Implement GICR_INMIR0Jinjie Ruan
2024-04-25hw/intc/arm_gicv3: Add has-nmi property to GICv3 deviceJinjie Ruan
2022-04-22hw/intc/arm_gicv3: Update ID and feature registers for GICv4Peter Maydell
2022-04-22hw/intc/arm_gicv3_cpuif: Support vLPIsPeter Maydell
2022-04-22hw/intc/arm_gicv3_cpuif: Split "update vIRQ/vFIQ" from gicv3_cpuif_virt_update()Peter Maydell
2022-04-22hw/intc/arm_gicv3: Implement new GICv4 redistributor registersPeter Maydell
2022-04-22hw/intc/arm_gicv3: Implement GICv4's new redistributor framePeter Maydell
2022-04-22hw/intc/arm_gicv3_its: Implement VINVALLPeter Maydell
2022-04-22hw/intc/arm_gicv3_its: Implement VMOVIPeter Maydell
2022-04-22hw/intc/arm_gicv3_its: Implement INV for virtual interruptsPeter Maydell
2022-04-22hw/intc/arm_gicv3_its: Implement INV command properlyPeter Maydell
2022-04-22hw/intc/arm_gicv3_its: Implement VSYNCPeter Maydell
2022-04-22hw/intc/arm_gicv3_its: Implement VMOVPPeter Maydell
2022-04-22hw/intc/arm_gicv3_its: Handle virtual interrupts in process_its_cmd()Peter Maydell
2022-04-22hw/intc/arm_gicv3_its: Implement VMAPPPeter Maydell
2022-04-22hw/intc/arm_gicv3_its: Implement VMAPI and VMAPTIPeter Maydell
2022-04-22hw/intc/arm_gicv3_its: Implement GITS_BASER2 for GICv4Peter Maydell
2022-04-22hw/intc/arm_gicv3: Report correct PIDR0 values for ID registersPeter Maydell
2022-02-08hw/intc/arm_gicv3_its: Fix address calculation in get_ite() and update_ite()Peter Maydell
2022-02-08hw/intc/arm_gicv3_its: Use address_space_map() to access command queue packetsPeter Maydell
2022-01-28hw/intc/arm_gicv3_its: Implement MOVIPeter Maydell
2022-01-28hw/intc/arm_gicv3_its: Implement MOVALLPeter Maydell
2022-01-28hw/intc/arm_gicv3: Set GICR_CTLR.CES if LPIs are supportedPeter Maydell
2022-01-28hw/intc/arm_gicv3_its: Sort ITS command list into numeric orderPeter Maydell
2022-01-07hw/intc/arm_gicv3_its: Use FIELD macros for CTEsPeter Maydell
2022-01-07hw/intc/arm_gicv3_its: Correct comment about CTE RDBase field sizePeter Maydell
2022-01-07hw/intc/arm_gicv3_its: Use FIELD macros for DTEsPeter Maydell
2022-01-07hw/intc/arm_gicv3_its: Don't misuse GITS_TYPE_PHYSICAL definePeter Maydell
2022-01-07hw/intc/arm_gicv3_its: Remove redundant ITS_CTLR_ENABLED definePeter Maydell
2021-11-26hw/intc/arm_gicv3: Add new gicv3_intid_is_special() functionPeter Maydell
2021-11-26hw/intc/arm_gicv3: Update cached state after LPI state changesPeter Maydell
2021-09-13hw/intc: GICv3 redistributor ITS processingShashi Mallela
2021-09-13hw/intc: GICv3 ITS Feature enablementShashi Mallela
2021-09-13hw/intc: GICv3 ITS Command processingShashi Mallela
2021-09-13hw/intc: GICv3 ITS command queue frameworkShashi Mallela
2021-09-13hw/intc: GICv3 ITS register definitions addedShashi Mallela
2021-09-13hw/intc: GICv3 ITS initial frameworkShashi Mallela
2017-02-28target-arm: Add GICv3CPUState in CPUARMState structVijaya Kumar K
2017-02-28hw/intc/arm_gicv3_kvm: Implement get/put functionsVijaya Kumar K
2017-01-20hw/intc/gicv3: Add defines for ICH system register fieldsPeter Maydell
2016-07-12Clean up decorations and whitespace around header guardsMarkus Armbruster
2016-06-17hw/intc/arm_gicv3: Add IRQ handling CPU interface registersPeter Maydell
2016-06-17hw/intc/arm_gicv3: Implement CPU i/f SGI generation registersPeter Maydell
2016-06-17hw/intc/arm_gicv3: Implement gicv3_cpuif_update()Peter Maydell
2016-06-17hw/intc/arm_gicv3: Implement GICv3 CPU interface registersPeter Maydell
2016-06-17hw/intc/arm_gicv3: Implement gicv3_set_irq()Peter Maydell
2016-06-17hw/intc/arm_gicv3: Implement GICv3 redistributor registersShlomo Pongratz
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