| Age | Commit message (Expand) | Author |
|---|
| 2018-08-20 | nvic: Expose NMI line | Peter Maydell |
| 2018-08-14 | nvic: Change NVIC to support ARMv6-M | Julia Suvorova |
| 2018-08-14 | arm: Add ARMv6-M programmer's model support | Julia Suvorova |
| 2018-08-14 | nvic: Handle ARMv6-M SCS reserved registers | Julia Suvorova |
| 2018-07-30 | armv7m_nvic: Fix m-security subsection name | Peter Maydell |
| 2018-07-24 | target/arm: Escalate to correct HardFault when AIRCR.BFHFNMINS is set | Peter Maydell |
| 2018-07-17 | hw/arm/armv7: Fix crash when introspecting the "iotkit" device | Thomas Huth |
| 2018-06-15 | arm: Don't crash if user tries to use a Cortex-M CPU without an NVIC | Peter Maydell |
| 2018-02-15 | hw/intc/armv7m_nvic: Fix byte-to-interrupt number conversions | Peter Maydell |
| 2018-02-15 | hw/intc/armv7m_nvic: Implement SCR | Peter Maydell |
| 2018-02-15 | hw/intc/armv7m_nvic: Implement cache ID registers | Peter Maydell |
| 2018-02-15 | hw/intc/armv7m_nvic: Implement v8M CPPWR register | Peter Maydell |
| 2018-02-15 | hw/intc/armv7m_nvic: Implement M profile cache maintenance ops | Peter Maydell |
| 2018-02-15 | hw/intc/armv7m_nvic: Fix ICSR PENDNMISET/CLR handling | Peter Maydell |
| 2018-02-15 | hw/intc/armv7m_nvic: Don't hardcode M profile ID registers in NVIC | Peter Maydell |
| 2018-02-09 | target/arm: Split "get pending exception info" from "acknowledge it" | Peter Maydell |
| 2018-02-09 | target/arm: Add armv7m_nvic_set_pending_derived() | Peter Maydell |
| 2018-01-16 | hw/intc/armv7m: Support byte and halfword accesses to CFSR | Peter Maydell |
| 2017-12-13 | nvic: Make systick banked | Peter Maydell |
| 2017-12-13 | nvic: Make nvic_sysreg_ns_ops work with any MemoryRegion | Peter Maydell |
| 2017-11-20 | nvic: Fix ARMv7M MPU_RBAR reads | Peter Maydell |
| 2017-10-12 | nvic: Fix miscalculation of offsets into ITNS array | Peter Maydell |
| 2017-10-12 | nvic: Add missing 'break' | Peter Maydell |
| 2017-10-06 | nvic: Add missing code for writing SHCSR.HARDFAULTPENDED bit | Peter Maydell |
| 2017-10-06 | nvic: Implement Security Attribution Unit registers | Peter Maydell |
| 2017-10-06 | target/arm: Add new-in-v8M SFSR and SFAR | Peter Maydell |
| 2017-10-06 | target/arm: Prepare for CONTROL.SPSEL being nonzero in Handler mode | Peter Maydell |
| 2017-10-06 | nvic: Clear the vector arrays and prigroup on reset | Peter Maydell |
| 2017-09-21 | nvic: Support banked exceptions in acknowledge and complete | Peter Maydell |
| 2017-09-21 | nvic: Make SHCSR banked for v8M | Peter Maydell |
| 2017-09-21 | nvic: Make ICSR banked for v8M | Peter Maydell |
| 2017-09-21 | target/arm: Handle banking in negative-execution-priority check in cpu_mmu_in... | Peter Maydell |
| 2017-09-21 | nvic: Handle v8M changes in nvic_exec_prio() | Peter Maydell |
| 2017-09-21 | nvic: Disable the non-secure HardFault if AIRCR.BFHFNMINS is clear | Peter Maydell |
| 2017-09-21 | nvic: Implement v8M changes to fixed priority exceptions | Peter Maydell |
| 2017-09-21 | nvic: In escalation to HardFault, support HF not being priority -1 | Peter Maydell |
| 2017-09-21 | nvic: Compare group priority for escalation to HF | Peter Maydell |
| 2017-09-21 | nvic: Make SHPR registers banked | Peter Maydell |
| 2017-09-21 | nvic: Make set_pending and clear_pending take a secure parameter | Peter Maydell |
| 2017-09-21 | nvic: Handle banked exceptions in nvic_recompute_state() | Peter Maydell |
| 2017-09-21 | nvic: Implement NVIC_ITNS<n> registers | Peter Maydell |
| 2017-09-21 | nvic: Make ICSR.RETTOBASE handle banked exceptions | Peter Maydell |
| 2017-09-21 | nvic: Implement AIRCR changes for v8M | Peter Maydell |
| 2017-09-21 | nvic: Add cached vectpending_prio state | Peter Maydell |
| 2017-09-21 | nvic: Add cached vectpending_is_s_banked state | Peter Maydell |
| 2017-09-21 | nvic: Add banked exception states | Peter Maydell |
| 2017-09-14 | nvic: Don't apply group priority mask to negative priorities | Peter Maydell |
| 2017-09-07 | target/arm: Make CFSR register banked for v8M | Peter Maydell |
| 2017-09-07 | target/arm: Make MMFAR banked for v8M | Peter Maydell |
| 2017-09-07 | target/arm: Make CCR register banked for v8M | Peter Maydell |
