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QEMU is a generic and open source machine & userspace emulator and virtualizer
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arm_gicv3_redist.c
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Commit message (
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Author
2023-07-25
arm: spelling fixes
Michael Tokarev
2023-01-18
bulk: Rename TARGET_FMT_plx -> HWADDR_FMT_plx
Philippe Mathieu-Daudé
2022-08-01
misc: fix commonly doubled up words
Daniel P. Berrangé
2022-06-08
Fix 'writeable' typos
Peter Maydell
2022-04-22
hw/intc/arm_gicv3: Update ID and feature registers for GICv4
Peter Maydell
2022-04-22
hw/intc/arm_gicv3_redist: Implement gicv3_redist_inv_vlpi()
Peter Maydell
2022-04-22
hw/intc/arm_gicv3_redist: Implement gicv3_redist_vinvall()
Peter Maydell
2022-04-22
hw/intc/arm_gicv3_redist: Implement gicv3_redist_mov_vlpi()
Peter Maydell
2022-04-22
hw/intc/arm_gicv3_redist: Use set_pending_table_bit() in mov handling
Peter Maydell
2022-04-22
hw/intc/arm_gicv3_redist: Implement gicv3_redist_vlpi_pending()
Peter Maydell
2022-04-22
hw/intc/arm_gicv3_redist: Implement gicv3_redist_process_vlpi()
Peter Maydell
2022-04-22
hw/intc/arm_gicv3_redist: Factor out "update bit in pending table" code
Peter Maydell
2022-04-22
hw/intc/arm_gicv3_redist: Recalculate hppvlpi on VPENDBASER writes
Peter Maydell
2022-04-22
hw/intc/arm_gicv3_redist: Factor out "update hpplpi for all LPIs" logic
Peter Maydell
2022-04-22
hw/intc/arm_gicv3_redist: Factor out "update hpplpi for one LPI" logic
Peter Maydell
2022-04-22
hw/intc/arm_gicv3_cpuif: Support vLPIs
Peter Maydell
2022-04-22
hw/intc/arm_gicv3: Implement new GICv4 redistributor registers
Peter Maydell
2022-04-22
hw/intc/arm_gicv3: Implement GICv4's new redistributor frame
Peter Maydell
2022-04-22
hw/intc/arm_gicv3_its: Implement VINVALL
Peter Maydell
2022-04-22
hw/intc/arm_gicv3_its: Implement VMOVI
Peter Maydell
2022-04-22
hw/intc/arm_gicv3_its: Implement INV for virtual interrupts
Peter Maydell
2022-04-22
hw/intc/arm_gicv3_its: Implement INV command properly
Peter Maydell
2022-04-22
hw/intc/arm_gicv3_its: Handle virtual interrupts in process_its_cmd()
Peter Maydell
2022-04-22
hw/intc/arm_gicv3: Report correct PIDR0 values for ID registers
Peter Maydell
2022-01-28
hw/intc/arm_gicv3_its: Implement MOVI
Peter Maydell
2022-01-28
hw/intc/arm_gicv3_its: Implement MOVALL
Peter Maydell
2022-01-28
hw/intc/arm_gicv3_redist: Remove unnecessary zero checks
Peter Maydell
2022-01-20
hw/intc/arm_gicv3: Check for !MEMTX_OK instead of MEMTX_ERROR
Philippe Mathieu-Daudé
2021-11-26
hw/intc/arm_gicv3: Update cached state after LPI state changes
Peter Maydell
2021-11-15
hw/intc/arm_gicv3: Support multiple redistributor regions
Peter Maydell
2021-09-13
hw/intc: GICv3 redistributor ITS processing
Shashi Mallela
2021-09-13
hw/intc: GICv3 ITS Feature enablement
Shashi Mallela
2021-07-09
hw/intc: Improve formatting of MEMTX_ERROR guest error message
Rebecca Cran
2019-06-17
hw/intc/arm_gicv3: Fix decoding of ID register range
Peter Maydell
2018-06-22
hw/intc/arm_gicv3: fix an extra left-shift when reading IPRIORITYR
Amol Surati
2018-01-11
hw/intc/arm_gicv3: Make reserved register addresses RAZ/WI
Peter Maydell
2016-07-19
arm_gicv3: Add assert()s to tell Coverity that offsets are aligned
Peter Maydell
2016-06-20
hw/intc/arm_gicv3: Fix compilation with simple trace backend
Peter Maydell
2016-06-17
hw/intc/arm_gicv3: Implement CPU i/f SGI generation registers
Peter Maydell
2016-06-17
hw/intc/arm_gicv3: Implement gicv3_set_irq()
Peter Maydell
2016-06-17
hw/intc/arm_gicv3: Implement GICv3 redistributor registers
Shlomo Pongratz