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path: root/hw/intc/arm_gic.c
AgeCommit message (Expand)Author
2024-09-13hw/intc/arm_gic: fix spurious level triggered interruptsJan Klötzke
2024-05-30hw/intc/arm_gic: Fix writes to GICD_ITARGETSRnSebastian Huber
2024-05-30hw/intc/arm_gic: Fix set pending of PPIsSebastian Huber
2024-05-28hw/intc/arm_gic: Fix handling of NS view of GICC_APR<n>Andrey Shumilin
2023-07-25arm: spelling fixesMichael Tokarev
2022-11-21hw/intc: add implementation of GICD_IIDR to Arm GICAlex Bennée
2022-11-21hw/intc: clean-up access to GIC multi-byte registersAlex Bennée
2022-01-20hw/intc/arm_gic: Allow reset of the running priorityPetr Pavlu
2022-01-20hw/intc/arm_gic: Implement read of GICC_IIDRPetr Pavlu
2021-02-02hw/intc/arm_gic: Fix interrupt ID in GICD_SGIR registerPhilippe Mathieu-Daudé
2021-02-02hw/intc/arm_gic: Allow to use QTest without crashingPhilippe Mathieu-Daudé
2021-01-08intc/arm_gic: Fix gic_irq_signaling_enabled() for vCPUsEdgar E. Iglesias
2020-02-28arm_gic: Mask the un-supported priority bitsSai Pavan Boddu
2019-08-21hw/core: Move cpu.c, cpu.h from qom/ to hw/core/Markus Armbruster
2019-08-16Include hw/irq.h a lot lessMarkus Armbruster
2019-06-12Include qemu/module.h where needed, drop it from qemu-common.hMarkus Armbruster
2018-09-25hw/intc/arm_gic: Drop GIC_BASE_IRQ macroPeter Maydell
2018-08-24hw/intc/arm_gic: Make per-cpu GICH memory regions 0x200 bytes largePeter Maydell
2018-08-14intc/arm_gic: Improve tracesLuc Michel
2018-08-14intc/arm_gic: Implement maintenance interrupt generationLuc Michel
2018-08-14intc/arm_gic: Implement gic_update_virt() functionLuc Michel
2018-08-14intc/arm_gic: Implement the virtual interface registersLuc Michel
2018-08-14intc/arm_gic: Wire the vCPU interfaceLuc Michel
2018-08-14intc/arm_gic: Implement virtualization extensions in gic_cpu_(read|write)Luc Michel
2018-08-14intc/arm_gic: Implement virtualization extensions in gic_(deactivate|complete...Luc Michel
2018-08-14intc/arm_gic: Implement virtualization extensions in gic_acknowledge_irqLuc Michel
2018-08-14intc/arm_gic: Implement virtualization extensions in gic_(activate_irq|drop_p...Luc Michel
2018-08-14intc/arm_gic: Add virtualization enabled IRQ helper functionsLuc Michel
2018-08-14intc/arm_gic: Refactor secure/ns access check in the CPU interfaceLuc Michel
2018-08-14intc/arm_gic: Add virtualization extensions helper macros and functionsLuc Michel
2018-08-14intc/arm_gic: Add the virtualization extensions to the GIC stateLuc Michel
2018-08-14intc/arm_gic: Remove some dead code and put some functions staticLuc Michel
2018-08-14intc/arm_gic: Implement GICD_ISACTIVERn and GICD_ICACTIVERn registersLuc Michel
2018-08-14intc/arm_gic: Refactor operations on the distributorLuc Michel
2018-07-16hw/intc/arm_gic: Fix handling of GICD_ITARGETSRPeter Maydell
2018-07-16hw/intc/arm_gic: Check interrupt number in gic_deactivate_irq()Peter Maydell
2018-02-05qdev: use device_class_set_parent_realize/unrealize/reset()Philippe Mathieu-Daudé
2018-01-25hw/intc/arm_gic: Fix the NS view of C_BPR when C_CTRL.CBPR is 1Luc MICHEL
2018-01-25hw/intc/arm_gic: Fix group priority computation for group 1 IRQsLuc MICHEL
2018-01-25hw/intc/arm_gic: Fix C_RPR value on idle priorityLuc MICHEL
2018-01-25hw/intc/arm_gic: Prevent the GIC from signaling an IRQ when it's "active and ...Luc MICHEL
2018-01-11hw/intc/arm_gic: reserved register addresses are RAZ/WIPeter Maydell
2017-07-11ARM: KVM: Enable in-kernel timers with user space gicAlexander Graf
2017-03-09hw/intc/arm_gic: modernise the DPRINTFAlex Bennée
2017-02-28arm: gic: Remove references to NVICMichael Davidsaver
2016-11-07nvic: set pending status for not active interruptsMarcin Krzeminski
2016-06-06hw/intc/gic: RAZ/WI non-sec access to sec interruptsJens Wiklander
2016-05-19hw: explicitly include qemu/log.hPaolo Bonzini
2016-05-16hw/intc/arm_gic: add tracepointsHollis Blanchard
2016-03-22include/qemu/osdep.h: Don't include qapi/error.hMarkus Armbruster
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