Age | Commit message (Expand) | Author |
2023-12-29 | hw/dma: Constify VMState | Richard Henderson |
2023-11-27 | hw/dma/xlnx_csu_dma: don't throw guest errors when stopping the SRC DMA | Frederic Konrad |
2023-11-27 | hw/misc, hw/ssi: Fix some URLs for AMD / Xilinx models | Frederic Konrad |
2023-10-19 | hw/dma: Declare link using static DEFINE_PROP_LINK() macro | Philippe Mathieu-Daudé |
2023-01-18 | bulk: Rename TARGET_FMT_plx -> HWADDR_FMT_plx | Philippe Mathieu-Daudé |
2022-05-19 | ptimer: Rename PTIMER_POLICY_DEFAULT to PTIMER_POLICY_LEGACY | Peter Maydell |
2022-03-18 | hw/dma/xlnx_csu_dma: Set TYPE_XLNX_CSU_DMA class_size | Peter Maydell |
2022-01-29 | Merge remote-tracking branch 'remotes/quintela-gitlab/tags/migration-20220128... | Peter Maydell |
2022-01-28 | Remove unnecessary minimum_version_id_old fields | Peter Maydell |
2022-01-28 | hw/dma/xlnx_csu_dma: Support starting a read transfer through a class method | Francisco Iglesias |
2021-08-26 | hw/dma/xlnx_csu_dma: Always expect 'dma' link property to be set | Philippe Mathieu-Daudé |
2021-08-26 | hw/dma/xlnx_csu_dma: Run trivial checks early in realize() | Philippe Mathieu-Daudé |
2021-05-02 | hw: Remove superfluous includes of hw/hw.h | Thomas Huth |
2021-03-08 | hw/dma: Implement a Xilinx CSU DMA model | Xuzhou Cheng |