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-rw-r--r--target/riscv/translate.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index 60fac0fe27..c1a30c2172 100644
--- a/target/riscv/translate.c
+++ b/target/riscv/translate.c
@@ -561,6 +561,12 @@ static void gen_clzw(TCGv ret, TCGv arg1)
tcg_gen_subi_tl(ret, ret, 32);
}
+static void gen_cpopw(TCGv ret, TCGv arg1)
+{
+ tcg_gen_ext32u_tl(arg1, arg1);
+ tcg_gen_ctpop_tl(ret, arg1);
+}
+
static bool gen_arith(DisasContext *ctx, arg_r *a,
void(*func)(TCGv, TCGv, TCGv))
{