diff options
Diffstat (limited to 'target/i386')
-rw-r--r-- | target/i386/cpu.c | 49 | ||||
-rw-r--r-- | target/i386/cpu.h | 3 | ||||
-rw-r--r-- | target/i386/monitor.c | 10 |
3 files changed, 54 insertions, 8 deletions
diff --git a/target/i386/cpu.c b/target/i386/cpu.c index bec2009a9c..69676e13e1 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -1522,6 +1522,50 @@ static X86CPUDefinition builtin_x86_defs[] = { .xlevel = 0x8000001A, .model_id = "AMD Opteron 63xx class CPU", }, + { + .name = "EPYC", + .level = 0xd, + .vendor = CPUID_VENDOR_AMD, + .family = 23, + .model = 1, + .stepping = 2, + .features[FEAT_1_EDX] = + CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX | CPUID_CLFLUSH | + CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA | CPUID_PGE | + CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 | CPUID_MCE | + CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE | CPUID_DE | + CPUID_VME | CPUID_FP87, + .features[FEAT_1_ECX] = + CPUID_EXT_RDRAND | CPUID_EXT_F16C | CPUID_EXT_AVX | + CPUID_EXT_XSAVE | CPUID_EXT_AES | CPUID_EXT_POPCNT | + CPUID_EXT_MOVBE | CPUID_EXT_SSE42 | CPUID_EXT_SSE41 | + CPUID_EXT_CX16 | CPUID_EXT_FMA | CPUID_EXT_SSSE3 | + CPUID_EXT_MONITOR | CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3, + .features[FEAT_8000_0001_EDX] = + CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_PDPE1GB | + CPUID_EXT2_FFXSR | CPUID_EXT2_MMXEXT | CPUID_EXT2_NX | + CPUID_EXT2_SYSCALL, + .features[FEAT_8000_0001_ECX] = + CPUID_EXT3_OSVW | CPUID_EXT3_3DNOWPREFETCH | + CPUID_EXT3_MISALIGNSSE | CPUID_EXT3_SSE4A | CPUID_EXT3_ABM | + CPUID_EXT3_CR8LEG | CPUID_EXT3_SVM | CPUID_EXT3_LAHF_LM, + .features[FEAT_7_0_EBX] = + CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 | CPUID_7_0_EBX_AVX2 | + CPUID_7_0_EBX_SMEP | CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_RDSEED | + CPUID_7_0_EBX_ADX | CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_CLFLUSHOPT | + CPUID_7_0_EBX_SHA_NI, + /* Missing: XSAVES (not supported by some Linux versions, + * including v4.1 to v4.12). + * KVM doesn't yet expose any XSAVES state save component. + */ + .features[FEAT_XSAVE] = + CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XSAVEC | + CPUID_XSAVE_XGETBV1, + .features[FEAT_6_EAX] = + CPUID_6_EAX_ARAT, + .xlevel = 0x8000000A, + .model_id = "AMD EPYC Processor", + }, }; typedef struct PropValue { @@ -2642,11 +2686,6 @@ static gchar *x86_gdb_arch_name(CPUState *cs) #endif } -X86CPU *cpu_x86_init(const char *cpu_model) -{ - return X86_CPU(cpu_generic_init(TYPE_X86_CPU, cpu_model)); -} - static void x86_cpu_cpudef_class_init(ObjectClass *oc, void *data) { X86CPUDefinition *cpudef = data; diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 051867399b..525d35d836 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1327,7 +1327,6 @@ int x86_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); void x86_cpu_exec_enter(CPUState *cpu); void x86_cpu_exec_exit(CPUState *cpu); -X86CPU *cpu_x86_init(const char *cpu_model); void x86_cpu_list(FILE *f, fprintf_function cpu_fprintf); int cpu_x86_support_mca_broadcast(CPUX86State *env); @@ -1507,7 +1506,7 @@ uint64_t cpu_get_tsc(CPUX86State *env); #define PHYS_ADDR_MASK MAKE_64BIT_MASK(0, TCG_PHYS_ADDR_BITS) -#define cpu_init(cpu_model) CPU(cpu_x86_init(cpu_model)) +#define cpu_init(cpu_model) cpu_generic_init(TYPE_X86_CPU, cpu_model) #define cpu_signal_handler cpu_x86_signal_handler #define cpu_list x86_cpu_list diff --git a/target/i386/monitor.c b/target/i386/monitor.c index 77ead60437..fe7d57b6aa 100644 --- a/target/i386/monitor.c +++ b/target/i386/monitor.c @@ -632,7 +632,15 @@ const MonitorDef *target_monitor_defs(void) void hmp_info_local_apic(Monitor *mon, const QDict *qdict) { - CPUState *cs = mon_get_cpu(); + CPUState *cs; + + if (qdict_haskey(qdict, "apic-id")) { + int id = qdict_get_try_int(qdict, "apic-id", 0); + cs = cpu_by_arch_id(id); + } else { + cs = mon_get_cpu(); + } + if (!cs) { monitor_printf(mon, "No CPU available\n"); |